From 195a3e8589312d0bc96f37c08e266539d7895d74 Mon Sep 17 00:00:00 2001 From: Aseda Aboagye Date: Mon, 13 Aug 2018 16:02:51 -0700 Subject: nocturne: Add board_set_tcpc_power_mode(). When depthcharge needs to update the TCPCs, it needs to reset them at the end of the update procedure. Conveniently, this function will be called if it exists, therefore this commit implements that function. It simply resets the TCPCs and then waits about 50ms for the part to come up. BUG=b:69010531 BRANCH=None TEST=With other patches, flash nocturne; verify that TCPC FW can be updated. Change-Id: Ie3dfd913b376a60fbf8de4c9f53cc9c6a497aa19 Signed-off-by: Aseda Aboagye Reviewed-on: https://chromium-review.googlesource.com/1173024 Commit-Ready: Aseda Aboagye Tested-by: Aseda Aboagye Reviewed-by: Caveh Jalali --- board/nocturne/board.c | 11 +++++++++++ board/nocturne/board.h | 1 + 2 files changed, 12 insertions(+) diff --git a/board/nocturne/board.c b/board/nocturne/board.c index 93452d6ed8..7cb856de3f 100644 --- a/board/nocturne/board.c +++ b/board/nocturne/board.c @@ -620,12 +620,23 @@ static void board_report_pmic_fault(const char *str) void board_reset_pd_mcu(void) { + cprints(CC_USB, "Resetting TCPCs..."); + cflush(); /* GPIO_USB_PD_RST_L resets all the TCPCs. */ gpio_set_level(GPIO_USB_PD_RST_L, 0); msleep(10); /* TODO(aaboagye): Verify min hold time. */ gpio_set_level(GPIO_USB_PD_RST_L, 1); } +void board_set_tcpc_power_mode(int port, int mode) +{ + /* Ignore the "mode" to turn the chip on. We can only do a reset. */ + if (mode) + return; + + board_reset_pd_mcu(); +} + void board_rtc_reset(void) { cprints(CC_SYSTEM, "Asserting RTCRST# to PCH"); diff --git a/board/nocturne/board.h b/board/nocturne/board.h index abe90b94ca..6e2bc300a4 100644 --- a/board/nocturne/board.h +++ b/board/nocturne/board.h @@ -261,6 +261,7 @@ int board_get_version(void); /* Reset all TCPCs. */ void board_reset_pd_mcu(void); +void board_set_tcpc_power_mode(int port, int mode); #endif /* __ASSEMBLER__ */ -- cgit v1.2.1