From 230aa1bc412c8c40137d8980873be9eedc986d74 Mon Sep 17 00:00:00 2001 From: Robert Zieba Date: Thu, 16 Mar 2023 20:55:03 +0000 Subject: zepyhr/test/skyrim: Add baseboard power signals test Add base board power signals test for skyrim. BRANCH=none BUG=b:247151116 TEST=Ran tests Change-Id: Ibace231b5123724a796d77535325f4ae1aede5f0 Signed-off-by: Robert Zieba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4354876 Reviewed-by: Tristan Honscheid --- zephyr/program/skyrim/src/power_signals.c | 11 +- zephyr/test/amd/prj.conf | 2 +- zephyr/test/skyrim/Kconfig | 11 + zephyr/test/skyrim/boards/native_posix.overlay | 146 +++++++- zephyr/test/skyrim/prj.conf | 2 + zephyr/test/skyrim/testcase.yaml | 11 +- zephyr/test/skyrim/tests/baseboard/CMakeLists.txt | 3 +- .../skyrim/tests/baseboard/src/power_signals.c | 388 +++++++++++++++++++++ zephyr/test/skyrim/tests/common/src/common.c | 22 ++ 9 files changed, 589 insertions(+), 7 deletions(-) create mode 100644 zephyr/test/skyrim/tests/baseboard/src/power_signals.c diff --git a/zephyr/program/skyrim/src/power_signals.c b/zephyr/program/skyrim/src/power_signals.c index b0919ae5f4..5814359606 100644 --- a/zephyr/program/skyrim/src/power_signals.c +++ b/zephyr/program/skyrim/src/power_signals.c @@ -3,6 +3,10 @@ * found in the LICENSE file. */ +#ifdef CONFIG_ZTEST +#define CHARGER_SOLO 0 +#endif + #include "ap_power/ap_power.h" #include "charger.h" #include "chipset.h" @@ -52,8 +56,9 @@ const struct prochot_cfg prochot_cfg = { }; /* Chipset hooks */ -static void baseboard_suspend_change(struct ap_power_ev_callback *cb, - struct ap_power_ev_data data) +test_export_static void +baseboard_suspend_change(struct ap_power_ev_callback *cb, + struct ap_power_ev_data data) { switch (data.event) { default: @@ -91,7 +96,7 @@ static void handle_prochot(bool asserted, void *data) ccprints("Charger prochot deasserted externally"); } -static void baseboard_init(void) +test_export_static void baseboard_init(void) { static struct ap_power_ev_callback cb; const struct gpio_dt_spec *gpio_ec_sfh_int_h = diff --git a/zephyr/test/amd/prj.conf b/zephyr/test/amd/prj.conf index ced2cda8f5..36d99e8716 100644 --- a/zephyr/test/amd/prj.conf +++ b/zephyr/test/amd/prj.conf @@ -12,4 +12,4 @@ CONFIG_PLATFORM_EC=y CONFIG_EMUL=y CONFIG_GPIO=y -CONFIG_AP_X86_AMD=y +CONFIG_AP_X86_AMD=y \ No newline at end of file diff --git a/zephyr/test/skyrim/Kconfig b/zephyr/test/skyrim/Kconfig index aab92c57f5..ca6c1d5e21 100644 --- a/zephyr/test/skyrim/Kconfig +++ b/zephyr/test/skyrim/Kconfig @@ -75,6 +75,11 @@ config TEST_BOARD_USB_PD_POLICY bool "Enable USB PD policy specific tests" select TEST_ENABLE_USB_PD_HOST_CMD +config TEST_BOARD_POWER_SIGNALS + bool "Enable power signals tests" + select AP_POWER_CONTROL + select BOARD_USB_HUB_RESET + config TEST_BOARD_PPC_CONFIG bool "Enable PPC config tests" @@ -97,6 +102,9 @@ config SKYRIM_LOG_LEVEL int "Fake config to allow building" default 4 # Log level debug by default +config AP_POWER_CONTROL + bool "Fake config to enable this feature" + config TEST_ENABLE_USB_PD_HOST_CMD bool "Fake config to enable this feature" @@ -106,4 +114,7 @@ config USB_PD_DISCHARGE config PLATFORM_EC_USB_MUX_RUNTIME_CONFIG bool "Fake config to enable this feature" +config BOARD_USB_HUB_RESET + bool "Fake config to enable this feature" + source "Kconfig.zephyr" diff --git a/zephyr/test/skyrim/boards/native_posix.overlay b/zephyr/test/skyrim/boards/native_posix.overlay index 4c3bab9ab7..aa3b9118b4 100644 --- a/zephyr/test/skyrim/boards/native_posix.overlay +++ b/zephyr/test/skyrim/boards/native_posix.overlay @@ -63,6 +63,108 @@ gpios = <&gpio0 11 GPIO_INPUT>; enum-name = "GPIO_TABLET_MODE_L"; }; + + /* Power signals */ + usb_a1_retimer_en: usb_a1_retimer_en { + gpios = <&gpio0 12 GPIO_OUTPUT_LOW>; + enum-name = "IOEX_USB_A1_RETIMER_EN"; + }; + + gpio_ec_disable_disp_bl: ec_disable_disp_bl { + gpios = <&gpio0 13 GPIO_OUTPUT_HIGH>; + enum-name = "GPIO_ENABLE_BACKLIGHT_L"; + }; + + gpio_slp_s3_l: slp_s3_l { + gpios = <&gpio0 14 GPIO_INPUT>; + enum-name = "GPIO_PCH_SLP_S3_L"; + alias = "GPIO_PCH_SLP_S0_L"; + }; + + gpio_slp_s5_l: slp_s5_l { + gpios = <&gpio0 15 GPIO_INPUT>; + enum-name = "GPIO_PCH_SLP_S5_L"; + }; + + gpio_s0_pgood: pg_pcore_s0_r_od { + gpios = <&gpio0 16 GPIO_INPUT>; + enum-name = "GPIO_S0_PGOOD"; + }; + + gpio_prochot_odl: prochot_odl { + gpios = <&gpio0 17 GPIO_INPUT>; + enum-name = "GPIO_CPU_PROCHOT"; + }; + + gpio_pg_lpddr5_s0_od: pg_lpddr5_s0_od { + gpios = <&gpio0 18 GPIO_INPUT>; + }; + + gpio_pg_lpddr5_s3_od: pg_lpddr5_s3_od { + gpios = <&gpio0 19 GPIO_INPUT>; + }; + + gpio_en_pwr_s3: en_pwr_s3 { + gpios = <&gpio0 20 GPIO_OUTPUT_LOW>; + }; + + gpio_en_pwr_s0_r: en_pwr_s0_r { + /* + * Needs to be configured as I/O to allow tested code to + * read this pin. + */ + gpios = <&gpio0 21 (GPIO_OUTPUT_LOW | GPIO_INPUT)>; + }; + + gpio_pg_groupc_s0_od: pg_groupc_s0_od { + gpios = <&gpio0 22 GPIO_INPUT>; + }; + + gpio_en_pwr_pcore_s0_r: en_pwr_pcore_s0_r { + /* + * Needs to be configured as I/O to allow tested code to + * read this pin. + */ + gpios = <&gpio0 23 (GPIO_OUTPUT_LOW | GPIO_INPUT)>; + }; + + gpio_pcore_ocp_r_l: pcore_ocp_r_l { + gpios = <&gpio0 24 GPIO_INPUT>; + }; + + /* STB dumping GPIOs */ + gpio_ec_sfh_int_h: ec_sfh_int_h { + gpios = <&gpio0 25 GPIO_OUTPUT_LOW>; + }; + gpio_sfh_ec_int_h: sfh_ec_int_h { + gpios = <&gpio0 26 GPIO_INPUT>; + }; + + gpio_ec_soc_pwr_good: ec_soc_pwr_good { + gpios = <&gpio0 27 GPIO_OUTPUT_LOW>; + }; + + gpio_ec_soc_pwr_btn_l: ec_soc_pwr_btn_l { + gpios = <&gpio0 28 GPIO_OUTPUT_HIGH>; + enum-name = "GPIO_PCH_PWRBTN_L"; + }; + + gpio_ec_soc_rsmrst_l: ec_soc_rsmrst_l { + /* + * Needs to be configured as I/O to allow tested code to + * read this pin. + */ + gpios = <&gpio0 29 (GPIO_OUTPUT_LOW | GPIO_INPUT)>; + enum-name = "GPIO_PCH_RSMRST_L"; + }; + + gpio_soc_thermtrip_odl: soc_thermtrip_odl { + gpios = <&gpio0 30 GPIO_INPUT>; + }; + + gpio_hub_rst: hub_rst { + gpios = <&gpio0 31 GPIO_OUTPUT_HIGH>; + }; }; gpio-interrupts { @@ -73,6 +175,48 @@ flags = ; handler = "bmi3xx_interrupt"; }; + + int_pg_groupc_s0: pg_groupc_s0 { + irq-pin = <&gpio_pg_groupc_s0_od>; + flags = ; + handler = "power_interrupt_handler"; + }; + + int_pg_lpddr_s0: pg_lpddr_s0 { + irq-pin = <&gpio_pg_lpddr5_s0_od>; + flags = ; + handler = "power_interrupt_handler"; + }; + + int_pg_lpddr_s3: pg_lpddr_s3 { + irq-pin = <&gpio_pg_lpddr5_s3_od>; + flags = ; + handler = "power_interrupt_handler"; + }; + + int_prochot: prochot { + irq-pin = <&gpio_prochot_odl>; + flags = ; + handler = "throttle_ap_prochot_input_interrupt"; + }; + + int_soc_pcore_ocp: soc_pcore_ocp { + irq-pin = <&gpio_pcore_ocp_r_l>; + flags = ; + handler = "baseboard_soc_pcore_ocp"; + }; + + int_soc_thermtrip: soc_thermtrip { + irq-pin = <&gpio_soc_thermtrip_odl>; + flags = ; + handler = "baseboard_soc_thermtrip"; + }; + + int_stb_dump: stb_dump { + irq-pin = <&gpio_sfh_ec_int_h>; + flags = ; + handler = "power_interrupt_handler"; + }; }; named-i2c-ports { @@ -245,5 +389,5 @@ }; &gpio0 { - ngpios = <23>; + ngpios = <32>; }; diff --git a/zephyr/test/skyrim/prj.conf b/zephyr/test/skyrim/prj.conf index ca32251fd7..a20cf94249 100644 --- a/zephyr/test/skyrim/prj.conf +++ b/zephyr/test/skyrim/prj.conf @@ -15,3 +15,5 @@ CONFIG_TEST_DISABLE_PLATFORM_EC_USBC=y CONFIG_EMUL=y CONFIG_GPIO=y CONFIG_EMUL_COMMON_I2C=y + +CONFIG_AP_X86_AMD=y diff --git a/zephyr/test/skyrim/testcase.yaml b/zephyr/test/skyrim/testcase.yaml index a29de143cf..62ccfad80e 100644 --- a/zephyr/test/skyrim/testcase.yaml +++ b/zephyr/test/skyrim/testcase.yaml @@ -5,11 +5,20 @@ common: platform_allow: native_posix tests: - # Baseboard tests + # Baseboard tests TEST_BOARD_POWER_SIGNALS skyrim.baseboard: extra_configs: - CONFIG_TEST_BOARD_BASEBOARD=y + skyrim.baseboard.power_signals: + extra_configs: + - CONFIG_TEST_BOARD_BASEBOARD=y + - CONFIG_TEST_BOARD_POWER_SIGNALS=y + - CONFIG_PLATFORM_EC_AMD_STB_DUMP=y + - CONFIG_PLATFORM_EC_THROTTLE_AP=y + - CONFIG_PLATFORM_EC_THROTTLE_AP_NO_FAN=y + - CONFIG_PLATFORM_EC_THROTTLE_AP_SINGLE_PIN=y + skyrim.baseboard.usb_pd_policy: extra_configs: - CONFIG_TEST_BOARD_BASEBOARD=y diff --git a/zephyr/test/skyrim/tests/baseboard/CMakeLists.txt b/zephyr/test/skyrim/tests/baseboard/CMakeLists.txt index 06d1d0e72f..cad84421a9 100644 --- a/zephyr/test/skyrim/tests/baseboard/CMakeLists.txt +++ b/zephyr/test/skyrim/tests/baseboard/CMakeLists.txt @@ -3,4 +3,5 @@ # found in the LICENSE file. target_sources(app PRIVATE src/common.c) -target_sources_ifdef(CONFIG_TEST_BOARD_USB_PD_POLICY app PRIVATE src/usb_pd_policy.c ${PLATFORM_EC_PROGRAM_DIR}/skyrim/src/usb_pd_policy.c) \ No newline at end of file +target_sources_ifdef(CONFIG_TEST_BOARD_USB_PD_POLICY app PRIVATE src/usb_pd_policy.c ${PLATFORM_EC_PROGRAM_DIR}/skyrim/src/usb_pd_policy.c) +target_sources_ifdef(CONFIG_TEST_BOARD_POWER_SIGNALS app PRIVATE src/power_signals ${PLATFORM_EC_PROGRAM_DIR}/skyrim/src/power_signals.c) \ No newline at end of file diff --git a/zephyr/test/skyrim/tests/baseboard/src/power_signals.c b/zephyr/test/skyrim/tests/baseboard/src/power_signals.c new file mode 100644 index 0000000000..c4bfba04a7 --- /dev/null +++ b/zephyr/test/skyrim/tests/baseboard/src/power_signals.c @@ -0,0 +1,388 @@ +/* Copyright 2023 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include "ap_power/ap_power.h" +#include "charger.h" +#include "gpio.h" +#include "gpio/gpio_int.h" +#include "ioexpander.h" +#include "power.h" + +#include +#include +#include +#include + +void baseboard_suspend_change(struct ap_power_ev_callback *cb, + struct ap_power_ev_data data); +void baseboard_init(void); +void baseboard_set_soc_pwr_pgood(enum gpio_signal unused); +bool board_supports_pcore_ocp(void); +void board_pwrbtn_to_pch(int level); +void baseboard_s0_pgood(enum gpio_signal signal); +void baseboard_set_en_pwr_pcore(enum gpio_signal unused); +void baseboard_en_pwr_s0(enum gpio_signal signal); +void baseboard_set_en_pwr_s3(enum gpio_signal signal); +void baseboard_s5_pgood(enum gpio_signal signal); + +void baseboard_soc_thermtrip(enum gpio_signal signal); +void baseboard_soc_pcore_ocp(enum gpio_signal signal); + +FAKE_VOID_FUNC(chipset_force_shutdown, enum chipset_shutdown_reason); +FAKE_VALUE_FUNC(int, extpower_is_present); +FAKE_VOID_FUNC(print_charger_prochot, int); +FAKE_VOID_FUNC(power_signal_interrupt, enum gpio_signal); +FAKE_VOID_FUNC(power_interrupt_handler, enum gpio_signal); + +int chipset_in_state(int mask) +{ + return mask & CHIPSET_STATE_ON; +} + +static int gpio_emul_output_get_dt(const struct gpio_dt_spec *dt) +{ + return gpio_emul_output_get(dt->port, dt->pin); +} + +static int gpio_emul_input_set_dt(const struct gpio_dt_spec *dt, int value) +{ + return gpio_emul_input_set(dt->port, dt->pin, value); +} + +/* Toggles the pin and checks that the interrupt handler was called. */ +int test_interrupt(const struct gpio_dt_spec *dt) +{ + int rv; + int old_count = power_interrupt_handler_fake.call_count; + + rv = gpio_emul_input_set_dt(dt, 0); + if (rv) + return rv; + + rv = gpio_emul_input_set_dt(dt, 1); + if (rv) + return rv; + + rv = gpio_emul_input_set_dt(dt, 1); + if (rv) + return rv; + + return power_interrupt_handler_fake.call_count <= old_count; +} + +static void power_signals_before(void *fixture) +{ + ARG_UNUSED(fixture); + RESET_FAKE(chipset_force_shutdown); + RESET_FAKE(extpower_is_present); + RESET_FAKE(print_charger_prochot); + RESET_FAKE(power_signal_interrupt); + RESET_FAKE(power_interrupt_handler); +} + +ZTEST_SUITE(power_signals, NULL, NULL, power_signals_before, NULL, NULL); + +ZTEST(power_signals, test_baseboard_suspend_change) +{ + const struct gpio_dt_spec *gpio_ec_disable_disp_bl = + GPIO_DT_FROM_NODELABEL(gpio_ec_disable_disp_bl); + const struct gpio_dt_spec *usb_a1_retimer_en = + GPIO_DT_FROM_NODELABEL(usb_a1_retimer_en); + + struct ap_power_ev_data data; + + data.event = AP_POWER_SUSPEND; + baseboard_suspend_change(NULL, data); + zassert_true(gpio_emul_output_get_dt(gpio_ec_disable_disp_bl)); + zassert_false(gpio_emul_output_get_dt(usb_a1_retimer_en)); + + data.event = AP_POWER_RESUME; + baseboard_suspend_change(NULL, data); + zassert_false(gpio_emul_output_get_dt(gpio_ec_disable_disp_bl)); + zassert_true(gpio_emul_output_get_dt(usb_a1_retimer_en)); +} + +ZTEST(power_signals, test_baseboard_init) +{ + const struct gpio_dt_spec *gpio_pg_groupc_s0_od = + GPIO_DT_FROM_NODELABEL(gpio_pg_groupc_s0_od); + const struct gpio_dt_spec *gpio_pg_lpddr5_s0_od = + GPIO_DT_FROM_NODELABEL(gpio_pg_lpddr5_s0_od); + const struct gpio_dt_spec *gpio_pg_lpddr5_s3_od = + GPIO_DT_FROM_NODELABEL(gpio_pg_lpddr5_s3_od); + const struct gpio_dt_spec *gpio_soc_thermtrip_odl = + GPIO_DT_FROM_NODELABEL(gpio_soc_thermtrip_odl); + const struct gpio_dt_spec *gpio_sfh_ec_int_h = + GPIO_DT_FROM_NODELABEL(gpio_sfh_ec_int_h); + const struct gpio_dt_spec *gpio_prochot_odl = + GPIO_DT_FROM_NODELABEL(gpio_prochot_odl); + + baseboard_init(); + + /* Trigger interrupts to validate that they've been enabled. */ + /* These interrupts use the generic test handler. */ + zassert_ok(test_interrupt(gpio_pg_groupc_s0_od)); + zassert_ok(test_interrupt(gpio_pg_lpddr5_s0_od)); + zassert_ok(test_interrupt(gpio_pg_lpddr5_s3_od)); + zassert_ok(test_interrupt(gpio_sfh_ec_int_h)); + + /* Verify that the thermal trip interrupt triggers a shutdown. */ + zassert_ok(gpio_emul_input_set_dt(gpio_soc_thermtrip_odl, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_soc_thermtrip_odl, 0)); + zassert_equal(chipset_force_shutdown_fake.call_count, 1); + zassert_equal(chipset_force_shutdown_fake.arg0_val, + CHIPSET_SHUTDOWN_THERMAL); + + /* Test that our prochot handler prints out charger info. */ + zassert_ok(gpio_emul_input_set_dt(gpio_prochot_odl, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_prochot_odl, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_prochot_odl, 1)); + /* Give plenty of time for the deferred logic to run. */ + k_msleep(500); + zassert_equal(print_charger_prochot_fake.call_count, 1); +} + +ZTEST(power_signals, test_baseboard_set_soc_pwr_pgood) +{ + const struct gpio_dt_spec *gpio_en_pwr_pcore_s0_r = + GPIO_DT_FROM_NODELABEL(gpio_en_pwr_pcore_s0_r); + const struct gpio_dt_spec *gpio_pg_lpddr5_s0_od = + GPIO_DT_FROM_NODELABEL(gpio_pg_lpddr5_s0_od); + const struct gpio_dt_spec *gpio_s0_pgood = + GPIO_DT_FROM_NODELABEL(gpio_s0_pgood); + + const struct gpio_dt_spec *gpio_ec_soc_pwr_good = + GPIO_DT_FROM_NODELABEL(gpio_ec_soc_pwr_good); + + /* Test all combinations of these power pins. */ + zassert_ok(gpio_pin_set_dt(gpio_en_pwr_pcore_s0_r, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s0_od, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_s0_pgood, 0)); + baseboard_set_soc_pwr_pgood(0); + zassert_false(gpio_emul_output_get_dt(gpio_ec_soc_pwr_good)); + + zassert_ok(gpio_pin_set_dt(gpio_en_pwr_pcore_s0_r, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s0_od, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_s0_pgood, 0)); + baseboard_set_soc_pwr_pgood(0); + zassert_false(gpio_emul_output_get_dt(gpio_ec_soc_pwr_good)); + + zassert_ok(gpio_pin_set_dt(gpio_en_pwr_pcore_s0_r, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s0_od, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_s0_pgood, 0)); + baseboard_set_soc_pwr_pgood(0); + zassert_false(gpio_emul_output_get_dt(gpio_ec_soc_pwr_good)); + + zassert_ok(gpio_pin_set_dt(gpio_en_pwr_pcore_s0_r, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s0_od, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_s0_pgood, 0)); + baseboard_set_soc_pwr_pgood(0); + zassert_false(gpio_emul_output_get_dt(gpio_ec_soc_pwr_good)); + + zassert_ok(gpio_pin_set_dt(gpio_en_pwr_pcore_s0_r, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s0_od, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_s0_pgood, 1)); + baseboard_set_soc_pwr_pgood(0); + zassert_false(gpio_emul_output_get_dt(gpio_ec_soc_pwr_good)); + + zassert_ok(gpio_pin_set_dt(gpio_en_pwr_pcore_s0_r, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s0_od, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_s0_pgood, 1)); + baseboard_set_soc_pwr_pgood(0); + zassert_false(gpio_emul_output_get_dt(gpio_ec_soc_pwr_good)); + + zassert_ok(gpio_pin_set_dt(gpio_en_pwr_pcore_s0_r, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s0_od, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_s0_pgood, 1)); + baseboard_set_soc_pwr_pgood(0); + zassert_false(gpio_emul_output_get_dt(gpio_ec_soc_pwr_good)); + + zassert_ok(gpio_pin_set_dt(gpio_en_pwr_pcore_s0_r, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s0_od, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_s0_pgood, 1)); + baseboard_set_soc_pwr_pgood(0); + zassert_true(gpio_emul_output_get_dt(gpio_ec_soc_pwr_good)); +} + +ZTEST(power_signals, test_board_supports_pcore_ocp) +{ + zassert_true(board_supports_pcore_ocp()); +} + +ZTEST(power_signals, test_baseboard_set_en_pwr_pcore) +{ + const struct gpio_dt_spec *gpio_pg_lpddr5_s3_od = + GPIO_DT_FROM_NODELABEL(gpio_pg_lpddr5_s3_od); + const struct gpio_dt_spec *gpio_pg_groupc_s0_od = + GPIO_DT_FROM_NODELABEL(gpio_pg_groupc_s0_od); + const struct gpio_dt_spec *gpio_en_pwr_s0_r = + GPIO_DT_FROM_NODELABEL(gpio_en_pwr_s0_r); + + const struct gpio_dt_spec *gpio_en_pwr_pcore_s0_r = + GPIO_DT_FROM_NODELABEL(gpio_en_pwr_pcore_s0_r); + + /* Test all combinations of these power pins. */ + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s3_od, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_groupc_s0_od, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_en_pwr_s0_r, 0)); + baseboard_set_en_pwr_pcore(0); + zassert_false(gpio_emul_output_get_dt(gpio_en_pwr_pcore_s0_r)); + + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s3_od, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_groupc_s0_od, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_en_pwr_s0_r, 0)); + baseboard_set_en_pwr_pcore(0); + zassert_false(gpio_emul_output_get_dt(gpio_en_pwr_pcore_s0_r)); + + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s3_od, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_groupc_s0_od, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_en_pwr_s0_r, 0)); + baseboard_set_en_pwr_pcore(0); + zassert_false(gpio_emul_output_get_dt(gpio_en_pwr_pcore_s0_r)); + + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s3_od, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_groupc_s0_od, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_en_pwr_s0_r, 0)); + baseboard_set_en_pwr_pcore(0); + zassert_false(gpio_emul_output_get_dt(gpio_en_pwr_pcore_s0_r)); + + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s3_od, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_groupc_s0_od, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_en_pwr_s0_r, 1)); + baseboard_set_en_pwr_pcore(0); + zassert_false(gpio_emul_output_get_dt(gpio_en_pwr_pcore_s0_r)); + + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s3_od, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_groupc_s0_od, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_en_pwr_s0_r, 1)); + baseboard_set_en_pwr_pcore(0); + zassert_false(gpio_emul_output_get_dt(gpio_en_pwr_pcore_s0_r)); + + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s3_od, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_groupc_s0_od, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_en_pwr_s0_r, 1)); + baseboard_set_en_pwr_pcore(0); + zassert_false(gpio_emul_output_get_dt(gpio_en_pwr_pcore_s0_r)); + + zassert_ok(gpio_emul_input_set_dt(gpio_pg_lpddr5_s3_od, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_groupc_s0_od, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_en_pwr_s0_r, 1)); + baseboard_set_en_pwr_pcore(0); + zassert_true(gpio_emul_output_get_dt(gpio_en_pwr_pcore_s0_r)); +} + +ZTEST(power_signals, test_baseboard_en_pwr_s0) +{ + const struct gpio_dt_spec *gpio_slp_s3_l = + GPIO_DT_FROM_NODELABEL(gpio_slp_s3_l); + const struct gpio_dt_spec *gpio_pg_pwr_s5 = + GPIO_DT_FROM_NODELABEL(gpio_pg_pwr_s5); + + const struct gpio_dt_spec *gpio_en_pwr_s0_r = + GPIO_DT_FROM_NODELABEL(gpio_en_pwr_s0_r); + + /* Test all combinations of these power pins. */ + zassert_ok(gpio_emul_input_set_dt(gpio_slp_s3_l, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_pwr_s5, 0)); + baseboard_en_pwr_s0(0); + zassert_false(gpio_emul_output_get_dt(gpio_en_pwr_s0_r)); + + zassert_ok(gpio_emul_input_set_dt(gpio_slp_s3_l, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_pwr_s5, 0)); + baseboard_en_pwr_s0(0); + zassert_false(gpio_emul_output_get_dt(gpio_en_pwr_s0_r)); + + zassert_ok(gpio_emul_input_set_dt(gpio_slp_s3_l, 0)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_pwr_s5, 1)); + baseboard_en_pwr_s0(0); + zassert_false(gpio_emul_output_get_dt(gpio_en_pwr_s0_r)); + + zassert_ok(gpio_emul_input_set_dt(gpio_slp_s3_l, 1)); + zassert_ok(gpio_emul_input_set_dt(gpio_pg_pwr_s5, 1)); + baseboard_en_pwr_s0(0); + zassert_true(gpio_emul_output_get_dt(gpio_en_pwr_s0_r)); + + /* Ensure we always are chaining off the normal handler. */ + zassert_equal(power_signal_interrupt_fake.call_count, 4); +} + +ZTEST(power_signals, test_baseboard_set_en_pwr_s3) +{ + const struct gpio_dt_spec *gpio_slp_s5_l = + GPIO_DT_FROM_NODELABEL(gpio_slp_s5_l); + + const struct gpio_dt_spec *gpio_en_pwr_s3 = + GPIO_DT_FROM_NODELABEL(gpio_en_pwr_s3); + + zassert_ok(gpio_emul_input_set_dt(gpio_slp_s5_l, 0)); + baseboard_set_en_pwr_s3(0); + zassert_false(gpio_emul_output_get_dt(gpio_en_pwr_s3)); + + zassert_ok(gpio_emul_input_set_dt(gpio_slp_s5_l, 1)); + baseboard_set_en_pwr_s3(0); + zassert_true(gpio_emul_output_get_dt(gpio_en_pwr_s3)); + + /* Ensure we always are chaining off the normal handler. */ + zassert_equal(power_signal_interrupt_fake.call_count, 2); +} + +ZTEST(power_signals, test_baseboard_s5_pgood) +{ + const struct gpio_dt_spec *gpio_pg_pwr_s5 = + GPIO_DT_FROM_NODELABEL(gpio_pg_pwr_s5); + const struct gpio_dt_spec *gpio_hub_rst = + GPIO_DT_FROM_NODELABEL(gpio_hub_rst); + + /* Test the path that waits 30 ms after S5 PGOOD. */ + zassert_ok(gpio_emul_input_set_dt(gpio_pg_pwr_s5, 1)); + baseboard_s5_pgood(0); + k_msleep(300); + zassert_false(gpio_emul_output_get_dt(gpio_hub_rst)); + + /* Test other path. */ + zassert_ok(gpio_emul_input_set_dt(gpio_pg_pwr_s5, 0)); + baseboard_s5_pgood(0); + zassert_true(gpio_emul_output_get_dt(gpio_hub_rst)); +} + +static void set_rsmrst_l(struct k_work *work) +{ + const struct gpio_dt_spec *gpio_ec_soc_rsmrst_l = + GPIO_DT_FROM_NODELABEL(gpio_ec_soc_rsmrst_l); + + k_msleep(10); + gpio_emul_input_set_dt(gpio_ec_soc_rsmrst_l, 1); +} +K_WORK_DEFINE(set_rsmrst_l_work, set_rsmrst_l); + +ZTEST(power_signals, test_board_pwrbtn_to_pch) +{ + const struct gpio_dt_spec *gpio_ec_soc_rsmrst_l = + GPIO_DT_FROM_NODELABEL(gpio_ec_soc_rsmrst_l); + const struct gpio_dt_spec *gpio_ec_soc_pwr_btn_l = + GPIO_DT_FROM_NODELABEL(gpio_ec_soc_pwr_btn_l); + + /* Test delay when asserting PWRBTN_L and RSMRST_L are low. */ + zassert_ok(gpio_emul_input_set_dt(gpio_ec_soc_rsmrst_l, 0)); + k_work_submit(&set_rsmrst_l_work); + board_pwrbtn_to_pch(0); + zassert_false(gpio_emul_output_get_dt(gpio_ec_soc_pwr_btn_l)); + + /* Test timeout. */ + zassert_ok(gpio_emul_input_set_dt(gpio_ec_soc_rsmrst_l, 0)); + board_pwrbtn_to_pch(0); + zassert_false(gpio_emul_output_get_dt(gpio_ec_soc_pwr_btn_l)); + + /* Test when PWRBTN_L is not asserted. */ + board_pwrbtn_to_pch(1); + zassert_true(gpio_emul_output_get_dt(gpio_ec_soc_pwr_btn_l)); +} + +ZTEST(power_signals, test_baseboard_soc_pcore_ocp) +{ + baseboard_soc_pcore_ocp(0); + zassert_equal(chipset_force_shutdown_fake.call_count, 1); + zassert_equal(chipset_force_shutdown_fake.arg0_val, + CHIPSET_SHUTDOWN_BOARD_CUSTOM); +} diff --git a/zephyr/test/skyrim/tests/common/src/common.c b/zephyr/test/skyrim/tests/common/src/common.c index 58f1d74df7..0be4550026 100644 --- a/zephyr/test/skyrim/tests/common/src/common.c +++ b/zephyr/test/skyrim/tests/common/src/common.c @@ -14,6 +14,19 @@ LOG_MODULE_REGISTER(skyrim, CONFIG_SKYRIM_LOG_LEVEL); * of test-specific device tree overrides needed. */ +test_mockable void baseboard_soc_pcore_ocp(enum gpio_signal signal) +{ +} + +test_mockable void baseboard_soc_thermtrip(enum gpio_signal signal) +{ +} + +test_mockable int bmi3xx_interrupt(enum gpio_signal signal) +{ + return -EINVAL; +} + test_mockable int board_anx7483_c0_mux_set(const struct usb_mux *me, mux_state_t mux_state) { @@ -25,3 +38,12 @@ test_mockable int board_anx7483_c1_mux_set(const struct usb_mux *me, { return -EINVAL; } + +test_mockable int power_interrupt_handler(const struct gpio_dt_spec *dt) +{ + return -EINVAL; +} + +test_mockable void throttle_ap_prochot_input_interrupt(enum gpio_signal signal) +{ +} -- cgit v1.2.1