From 36f26030987367e60a8d97dbce9f47f7fda14729 Mon Sep 17 00:00:00 2001 From: Kevin K Wong Date: Tue, 3 Mar 2015 08:58:56 -0800 Subject: mec1322: Updated code to only clear the interrupt status bit of LPC_RESET#. Interrupt Source register is R/WC, so the specific bit should be cleared by directly writing that bit instead of |=. BUG=none TEST=Verified LPC_RESET# is detected by interrupt handler via EC console message. BRANCH=none Change-Id: Ib553c839e1311538b17a4d9fbc10c9df5b7e6b44 Signed-off-by: Kevin K Wong Reviewed-on: https://chromium-review.googlesource.com/256854 Reviewed-by: Shawn N Reviewed-by: Vic Yang --- chip/mec1322/lpc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/chip/mec1322/lpc.c b/chip/mec1322/lpc.c index b3c3da9ff0..421330246c 100644 --- a/chip/mec1322/lpc.c +++ b/chip/mec1322/lpc.c @@ -195,7 +195,7 @@ static void setup_lpc(void) gpio_config_module(MODULE_LPC, 1); /* Set up interrupt on LRESET# deassert */ - MEC1322_INT_SOURCE(19) |= 1 << 1; + MEC1322_INT_SOURCE(19) = 1 << 1; MEC1322_INT_ENABLE(19) |= 1 << 1; MEC1322_INT_BLK_EN |= 1 << 19; task_enable_irq(MEC1322_IRQ_GIRQ19); @@ -281,7 +281,7 @@ void girq19_interrupt(void) lpc_get_pltrst_asserted() ? "" : "de"); /* Clear interrupt source */ - MEC1322_INT_SOURCE(19) |= 1 << 1; + MEC1322_INT_SOURCE(19) = 1 << 1; } } DECLARE_IRQ(MEC1322_IRQ_GIRQ19, girq19_interrupt, 1); -- cgit v1.2.1