From 5837e32e2dfbbbe50e5ba51eb6464b0c2b6f4103 Mon Sep 17 00:00:00 2001 From: Zhuohao Lee Date: Tue, 24 Aug 2021 20:45:28 +0800 Subject: brask: modify the usbc setting There are 3 usb typec ports in the brask. The configuration listed below: Port 0: TCPC NCT3808-1, TCPPC SYV682B, Burnside Bridge retimer. Port 1: TCPC RT1716, TCPPC SYV682B, Kandou KB8002. Port 2: TCPC NCT3808-2, TCPPC SYV682B, Burnside Bridge retimer. In order to support the above configuration, this patch modifies: 1. use syv682v instead of using nv20p3483. 2. use rt1716 instead of using ps8815. 3. use kb800x retimer. 4. remove the fw_config because we don't need it to switch the different DBs. BUG=b:191637086 BRANCH=None TEST=make BOARD=brask Change-Id: Ie09aef9dc7cc7a532b34d86ea022127099f7735e Signed-off-by: Zhuohao Lee Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3115807 Reviewed-by: caveh jalali Reviewed-by: Boris Mittelberg --- baseboard/brask/baseboard.h | 7 +-- board/brask/board.c | 6 --- board/brask/board.h | 21 ++++---- board/brask/build.mk | 1 - board/brask/fw_config.c | 45 ----------------- board/brask/fw_config.h | 54 --------------------- board/brask/usbc_config.c | 114 +++++++++++--------------------------------- board/brask/usbc_config.h | 2 - 8 files changed, 43 insertions(+), 207 deletions(-) delete mode 100644 board/brask/fw_config.c delete mode 100644 board/brask/fw_config.h diff --git a/baseboard/brask/baseboard.h b/baseboard/brask/baseboard.h index e285482c61..fc581c207c 100644 --- a/baseboard/brask/baseboard.h +++ b/baseboard/brask/baseboard.h @@ -62,10 +62,11 @@ #undef CONFIG_DEDICATED_CHARGE_PORT_COUNT #define CONFIG_DEDICATED_CHARGE_PORT_COUNT 1 /* - * Don't allow the system to boot to S0 when the battery is low and unable to - * communicate on locked systems (which haven't PD negotiated) + * TODO(b/197475210): Don't allow the system to boot to S0 when + * the power is lower than CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON + * since there is no battery. */ -#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 15001 +#define CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON 30000 /* Chipset config */ #define CONFIG_CHIPSET_ALDERLAKE_SLG4BD44540 diff --git a/board/brask/board.c b/board/brask/board.c index bdab1a7199..a9c6b57ec5 100644 --- a/board/brask/board.c +++ b/board/brask/board.c @@ -12,7 +12,6 @@ #include "power.h" #include "switch.h" #include "throttle_ap.h" -#include "usbc_config.h" #include "gpio_list.h" /* Must come after other header files. */ @@ -30,11 +29,6 @@ BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); /******************************************************************************/ -__override void board_cbi_init(void) -{ - config_usb_db_type(); -} - int board_set_active_charge_port(int port) { /* TODO(b/197514362): set either barreljack or typec port */ diff --git a/board/brask/board.h b/board/brask/board.h index dbd94d2be7..e27292c08f 100644 --- a/board/brask/board.h +++ b/board/brask/board.h @@ -27,23 +27,28 @@ #define CONFIG_IO_EXPANDER #define CONFIG_IO_EXPANDER_NCT38XX -#define CONFIG_IO_EXPANDER_PORT_COUNT 4 +#define CONFIG_IO_EXPANDER_PORT_COUNT 2 -#define CONFIG_USB_PD_TCPM_PS8815 +#define CONFIG_USB_PD_PPC +#define CONFIG_USB_PD_TCPM_RT1715 #define CONFIG_USBC_RETIMER_INTEL_BB - +/* TODO(b/197505149): need to fix the build error and clarify + * how to set the usb_ls_en_gpio and retimer_rst_gpio + * in the same array. + */ +/* #define CONFIG_USBC_RETIMER_KB800X */ #define CONFIG_USBC_PPC_SYV682X -#define CONFIG_USBC_PPC_NX20P3483 /* TODO: b/177608416 - measure and check these values on brya */ #define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ #define PD_POWER_SUPPLY_TURN_OFF_DELAY 30000 /* us */ #define PD_VCONN_SWAP_DELAY 5000 /* us */ -/* - * Passive USB-C cables only support up to 60W. +/* The design should support up to 100W. */ +/* TODO(b/197702356): Set the max PD to 60W now and change it + * to 100W after we verify it. */ -#define PD_OPERATING_POWER_MW 15000 +#define PD_OPERATING_POWER_MW CONFIG_CHARGER_MIN_POWER_MW_FOR_POWER_ON #define PD_MAX_POWER_MW 60000 #define PD_MAX_CURRENT_MA 3000 #define PD_MAX_VOLTAGE_MV 20000 @@ -160,8 +165,6 @@ enum temp_sensor_id { enum ioex_port { IOEX_C0_NCT38XX = 0, IOEX_C2_NCT38XX, - IOEX_ID_1_C0_NCT38XX, - IOEX_ID_1_C2_NCT38XX, IOEX_PORT_COUNT }; diff --git a/board/brask/build.mk b/board/brask/build.mk index 4bf53631b1..341f4e3659 100644 --- a/board/brask/build.mk +++ b/board/brask/build.mk @@ -13,7 +13,6 @@ BASEBOARD:=brask board-y= board-y+=board.o -board-y+=fw_config.o board-y+=i2c.o board-y+=pwm.o board-y+=sensors.o diff --git a/board/brask/fw_config.c b/board/brask/fw_config.c deleted file mode 100644 index 7afdae3837..0000000000 --- a/board/brask/fw_config.c +++ /dev/null @@ -1,45 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#include "common.h" -#include "compile_time_macros.h" -#include "console.h" -#include "cros_board_info.h" -#include "fw_config.h" - -#define CPRINTS(format, args...) cprints(CC_CHIPSET, format, ## args) - -static union brya_cbi_fw_config fw_config; -BUILD_ASSERT(sizeof(fw_config) == sizeof(uint32_t)); - -/* - * FW_CONFIG defaults for brya if the CBI.FW_CONFIG data is not - * initialized. - */ -static const union brya_cbi_fw_config fw_config_defaults = { - .usb_db = DB_USB3_PS8815, - .kb_bl = KEYBOARD_BACKLIGHT_ENABLED, -}; - -/**************************************************************************** - * Brya FW_CONFIG access - */ -void board_init_fw_config(void) -{ - if (cbi_get_fw_config(&fw_config.raw_value)) { - CPRINTS("CBI: Read FW_CONFIG failed, using board defaults"); - fw_config = fw_config_defaults; - } -} - -union brya_cbi_fw_config get_fw_config(void) -{ - return fw_config; -} - -enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void) -{ - return fw_config.usb_db; -} diff --git a/board/brask/fw_config.h b/board/brask/fw_config.h deleted file mode 100644 index 6e4eb3ef58..0000000000 --- a/board/brask/fw_config.h +++ /dev/null @@ -1,54 +0,0 @@ -/* Copyright 2021 The Chromium OS Authors. All rights reserved. - * Use of this source code is governed by a BSD-style license that can be - * found in the LICENSE file. - */ - -#ifndef __BOARD_BRYA_FW_CONFIG_H_ -#define __BOARD_BRYA_FW_CONFIG_H_ - -#include - -/**************************************************************************** - * CBI FW_CONFIG layout for Brya board. - * - * Source of truth is the project/brya/brya/config.star configuration file. - */ - -enum ec_cfg_usb_db_type { - DB_USB_ABSENT = 0, - DB_USB3_PS8815 = 1, - DB_USB_ABSENT2 = 15 -}; - -enum ec_cfg_keyboard_backlight_type { - KEYBOARD_BACKLIGHT_DISABLED = 0, - KEYBOARD_BACKLIGHT_ENABLED = 1 -}; - -union brya_cbi_fw_config { - struct { - enum ec_cfg_usb_db_type usb_db : 4; - uint32_t sd_db : 2; - uint32_t lte_db : 1; - enum ec_cfg_keyboard_backlight_type kb_bl : 1; - uint32_t audio : 3; - uint32_t reserved_1 : 21; - }; - uint32_t raw_value; -}; - -/** - * Read the cached FW_CONFIG. Guaranteed to have valid values. - * - * @return the FW_CONFIG for the board. - */ -union brya_cbi_fw_config get_fw_config(void); - -/** - * Get the USB daughter board type from FW_CONFIG. - * - * @return the USB daughter board type. - */ -enum ec_cfg_usb_db_type ec_cfg_usb_db_type(void); - -#endif /* __BOARD_BRYA_FW_CONFIG_H_ */ diff --git a/board/brask/usbc_config.c b/board/brask/usbc_config.c index 854ed0081c..d60371e348 100644 --- a/board/brask/usbc_config.c +++ b/board/brask/usbc_config.c @@ -10,14 +10,13 @@ #include "compile_time_macros.h" #include "console.h" #include "driver/bc12/pi3usb9201_public.h" -#include "driver/ppc/nx20p348x.h" #include "driver/ppc/syv682x_public.h" #include "driver/retimer/bb_retimer_public.h" +#include "driver/retimer/kb800x.h" #include "driver/tcpm/nct38xx.h" -#include "driver/tcpm/ps8xxx_public.h" +#include "driver/tcpm/rt1715.h" #include "driver/tcpm/tcpci.h" #include "ec_commands.h" -#include "fw_config.h" #include "gpio.h" #include "gpio_signal.h" #include "hooks.h" @@ -52,11 +51,9 @@ const struct tcpc_config_t tcpc_config[] = { .bus_type = EC_BUS_TYPE_I2C, .i2c_info = { .port = I2C_PORT_USB_C1_TCPC, - .addr_flags = PS8751_I2C_ADDR1_FLAGS, + .addr_flags = RT1715_I2C_ADDR_FLAGS, }, - .drv = &ps8xxx_tcpm_drv, - .flags = TCPC_FLAGS_TCPCI_REV2_0 | - TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V, + .drv = &rt1715_tcpm_drv, }, [USBC_PORT_C2] = { .bus_type = EC_BUS_TYPE_I2C, @@ -79,17 +76,12 @@ struct ppc_config_t ppc_chips[] = { .drv = &syv682x_drv, }, [USBC_PORT_C1] = { - /* Compatible with Silicon Mitus SM536A0 */ .i2c_port = I2C_PORT_USB_C1_PPC, - .i2c_addr_flags = NX20P3483_ADDR2_FLAGS, - .drv = &nx20p348x_drv, + .i2c_addr_flags = SYV682X_ADDR0_FLAGS, + .drv = &syv682x_drv, }, [USBC_PORT_C2] = { .i2c_port = I2C_PORT_USB_C0_C2_PPC, - /* - * b/179987870 - * schematics I2C map says ADDR3 - */ .i2c_addr_flags = SYV682X_ADDR2_FLAGS, .drv = &syv682x_drv, }, @@ -104,23 +96,17 @@ static const struct usb_mux usbc0_tcss_usb_mux = { .driver = &virtual_usb_mux_driver, .hpd_update = &virtual_hpd_update, }; +static const struct usb_mux usbc1_tcss_usb_mux = { + .usb_port = USBC_PORT_C1, + .driver = &virtual_usb_mux_driver, + .hpd_update = &virtual_hpd_update, +}; static const struct usb_mux usbc2_tcss_usb_mux = { .usb_port = USBC_PORT_C2, .driver = &virtual_usb_mux_driver, .hpd_update = &virtual_hpd_update, }; -/* - * USB3 DB mux configuration - the top level mux still needs to be set - * to the virtual_usb_mux_driver so the AP gets notified of mux changes - * and updates the TCSS configuration on state changes. - */ -static const struct usb_mux usbc1_usb3_db_retimer = { - .usb_port = USBC_PORT_C1, - .driver = &tcpci_tcpm_usb_mux_driver, - .hpd_update = &ps8xxx_tcpc_update_hpd_status, -}; - const struct usb_mux usb_muxes[] = { [USBC_PORT_C0] = { .usb_port = USBC_PORT_C0, @@ -130,11 +116,15 @@ const struct usb_mux usb_muxes[] = { .next_mux = &usbc0_tcss_usb_mux, }, [USBC_PORT_C1] = { - /* PS8815 DB */ .usb_port = USBC_PORT_C1, - .driver = &virtual_usb_mux_driver, - .hpd_update = &virtual_hpd_update, - .next_mux = &usbc1_usb3_db_retimer, + /* TODO(b/197505149): need to fix the build error and + * clarify how to set the usb_ls_en_gpio and + * retimer_rst_gpio in the same array. + */ + /*.driver = &kb800x_usb_mux_driver, */ + .i2c_port = I2C_PORT_USB_C1_MUX, + .i2c_addr_flags = USBC_PORT_C0_BB_RETIMER_I2C_ADDR, + .next_mux = &usbc1_tcss_usb_mux, }, [USBC_PORT_C2] = { .usb_port = USBC_PORT_C2, @@ -185,32 +175,9 @@ struct ioexpander_config_t ioex_config[] = { .drv = &nct38xx_ioexpander_drv, .flags = IOEX_FLAGS_DISABLED, }, - [IOEX_ID_1_C0_NCT38XX] = { - .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, - .i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS, - .drv = &nct38xx_ioexpander_drv, - .flags = IOEX_FLAGS_DISABLED, - }, - [IOEX_ID_1_C2_NCT38XX] = { - .i2c_host_port = I2C_PORT_USB_C0_C2_TCPC, - .i2c_addr_flags = NCT38XX_I2C_ADDR2_1_FLAGS, - .drv = &nct38xx_ioexpander_drv, - .flags = IOEX_FLAGS_DISABLED, - }, }; BUILD_ASSERT(ARRAY_SIZE(ioex_config) == CONFIG_IO_EXPANDER_PORT_COUNT); -void config_usb_db_type(void) -{ - enum ec_cfg_usb_db_type db_type = ec_cfg_usb_db_type(); - - /* - * TODO(b/180434685): implement multiple DB types - */ - - CPRINTS("Configured USB DB type number is %d", db_type); -} - __override int bb_retimer_power_enable(const struct usb_mux *me, bool enable) { enum ioex_signal rst_signal; @@ -273,9 +240,7 @@ void board_reset_pd_mcu(void) */ gpio_set_level(tcpc_rst, 0); - if (ec_cfg_usb_db_type() != DB_USB_ABSENT) { - gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0); - } + gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0); /* * delay for power-on to reset-off and min. assertion time @@ -284,9 +249,7 @@ void board_reset_pd_mcu(void) msleep(20); gpio_set_level(tcpc_rst, 1); - if (ec_cfg_usb_db_type() != DB_USB_ABSENT) { - gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1); - } + gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1); /* wait for chips to come up */ @@ -321,15 +284,8 @@ static void board_tcpc_init(void) /* Enable TCPC interrupts. */ gpio_enable_interrupt(GPIO_USB_C0_C2_TCPC_INT_ODL); - /* Enable BC1.2 interrupts. */ - gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C2_BC12_INT_ODL); - - if (ec_cfg_usb_db_type() != DB_USB_ABSENT) { - gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); - gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_ODL); - } + gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL); } DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET); @@ -340,8 +296,7 @@ uint16_t tcpc_get_alert_status(void) if (gpio_get_level(GPIO_USB_C0_C2_TCPC_INT_ODL) == 0) status |= PD_STATUS_TCPC_ALERT_0 | PD_STATUS_TCPC_ALERT_2; - if ((ec_cfg_usb_db_type() != DB_USB_ABSENT) && - gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0) + if (gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0) status |= PD_STATUS_TCPC_ALERT_1; return status; @@ -351,8 +306,7 @@ int ppc_get_alert_status(int port) { if (port == USBC_PORT_C0) return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; - else if ((port == USBC_PORT_C1) && - (ec_cfg_usb_db_type() != DB_USB_ABSENT)) + else if (port == USBC_PORT_C1) return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; else if (port == USBC_PORT_C2) return gpio_get_level(GPIO_USB_C2_PPC_INT_ODL) == 0; @@ -366,8 +320,6 @@ void tcpc_alert_event(enum gpio_signal signal) schedule_deferred_pd_interrupt(USBC_PORT_C0); break; case GPIO_USB_C1_TCPC_INT_ODL: - if (ec_cfg_usb_db_type() == DB_USB_ABSENT) - break; schedule_deferred_pd_interrupt(USBC_PORT_C1); break; default: @@ -382,8 +334,6 @@ void bc12_interrupt(enum gpio_signal signal) task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); break; case GPIO_USB_C1_BC12_INT_ODL: - if (ec_cfg_usb_db_type() == DB_USB_ABSENT) - break; task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); break; case GPIO_USB_C2_BC12_INT_ODL: @@ -401,14 +351,7 @@ void ppc_interrupt(enum gpio_signal signal) syv682x_interrupt(USBC_PORT_C0); break; case GPIO_USB_C1_PPC_INT_ODL: - switch (ec_cfg_usb_db_type()) { - case DB_USB_ABSENT: - case DB_USB_ABSENT2: - break; - case DB_USB3_PS8815: - nx20p348x_interrupt(USBC_PORT_C1); - break; - } + syv682x_interrupt(USBC_PORT_C1); break; case GPIO_USB_C2_PPC_INT_ODL: syv682x_interrupt(USBC_PORT_C2); @@ -432,10 +375,7 @@ __override bool board_is_dts_port(int port) __override bool board_is_tbt_usb4_port(int port) { - if (port == USBC_PORT_C0 || port == USBC_PORT_C2) - return true; - - return false; + return true; } __override enum tbt_compat_cable_speed board_get_max_tbt_speed(int port) diff --git a/board/brask/usbc_config.h b/board/brask/usbc_config.h index 5d08a446fb..7319bcb5e2 100644 --- a/board/brask/usbc_config.h +++ b/board/brask/usbc_config.h @@ -17,6 +17,4 @@ enum usbc_port { USBC_PORT_COUNT }; -void config_usb_db_type(void); - #endif /* __CROS_EC_USBC_CONFIG_H */ -- cgit v1.2.1