From 65ba93af93d5f05cc00a1acaafc2f172f578a722 Mon Sep 17 00:00:00 2001 From: Nick Sanders Date: Mon, 15 Aug 2016 13:43:12 -0700 Subject: sweetberry: add build target for sweetberry sweetberry is an stm32f446 based power monitoring board, with 48 channels of INA current sense chips BUG=chromium:608039 TEST=boots BRANCH=none Change-Id: If263bcee3a648ba3605f991999d481b7a0e2a1db Signed-off-by: Nick Sanders Reviewed-on: https://chromium-review.googlesource.com/370718 Reviewed-by: Daisuke Nojiri --- board/sweetberry/board.c | 57 +++++++++++++++++++++++++++ board/sweetberry/board.h | 54 ++++++++++++++++++++++++++ board/sweetberry/build.mk | 12 ++++++ board/sweetberry/ec.tasklist | 21 ++++++++++ board/sweetberry/gpio.inc | 91 ++++++++++++++++++++++++++++++++++++++++++++ util/flash_ec | 1 + 6 files changed, 236 insertions(+) create mode 100644 board/sweetberry/board.c create mode 100644 board/sweetberry/board.h create mode 100644 board/sweetberry/build.mk create mode 100644 board/sweetberry/ec.tasklist create mode 100644 board/sweetberry/gpio.inc diff --git a/board/sweetberry/board.c b/board/sweetberry/board.c new file mode 100644 index 0000000000..902917001a --- /dev/null +++ b/board/sweetberry/board.c @@ -0,0 +1,57 @@ +/* Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +/* Sweetberry board configuration */ + +#include "common.h" +#include "dma.h" +#include "ec_version.h" +#include "gpio.h" +#include "gpio_list.h" +#include "hooks.h" +#include "i2c.h" +#include "registers.h" +#include "stm32-dma.h" +#include "task.h" +#include "util.h" + + +#define GPIO_SET_HS(bank, number) \ + (STM32_GPIO_OSPEEDR(GPIO_##bank) |= (0x3 << ((number) * 2))) + +void board_config_post_gpio_init(void) +{ + /* We use MCO2 clock passthrough to provide a clock to USB HS */ + gpio_config_module(MODULE_MCO, 1); + /* GPIO PC9 to high speed */ + GPIO_SET_HS(C, 9); + + /* Set USB GPIO to high speed */ + GPIO_SET_HS(A, 11); + GPIO_SET_HS(A, 12); + + GPIO_SET_HS(C, 3); + GPIO_SET_HS(C, 2); + GPIO_SET_HS(C, 0); + GPIO_SET_HS(A, 5); + + GPIO_SET_HS(B, 5); + GPIO_SET_HS(B, 13); + GPIO_SET_HS(B, 12); + GPIO_SET_HS(B, 2); + GPIO_SET_HS(B, 10); + GPIO_SET_HS(B, 1); + GPIO_SET_HS(B, 0); + GPIO_SET_HS(A, 3); + + /* Set I2C GPIO to HS */ + GPIO_SET_HS(B, 6); + GPIO_SET_HS(B, 7); + GPIO_SET_HS(F, 1); + GPIO_SET_HS(F, 0); + GPIO_SET_HS(A, 8); + GPIO_SET_HS(B, 4); + GPIO_SET_HS(C, 6); + GPIO_SET_HS(C, 7); +} diff --git a/board/sweetberry/board.h b/board/sweetberry/board.h new file mode 100644 index 0000000000..1b0eddb263 --- /dev/null +++ b/board/sweetberry/board.h @@ -0,0 +1,54 @@ +/* Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Sweetberry configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +/* Use external clock */ +#define CONFIG_STM32_CLOCK_HSE_HZ 24000000 + +#define CONFIG_BOARD_POST_GPIO_INIT + +/* Enable console recasting of GPIO type. */ +#define CONFIG_CMD_GPIO_EXTENDED + +/* The UART console can be on flax USART3 (PC10/PC11) */ +/* The UART console can be on header USART4 (PA0/PA1) */ +#undef CONFIG_UART_CONSOLE +#define CONFIG_UART_CONSOLE 4 +#undef CONFIG_UART_TX_BUF_SIZE +#define CONFIG_UART_TX_BUF_SIZE 4096 +/* Don't waste precious DMA channels on console. */ +#undef CONFIG_UART_TX_DMA +#undef CONFIG_UART_RX_DMA + +#define CONFIG_UART_TX_REQ_CH 4 +#define CONFIG_UART_RX_REQ_CH 4 + +/* This is not actually a Chromium EC so disable some features. */ +#undef CONFIG_WATCHDOG_HELP +#undef CONFIG_LID_SWITCH +#undef CONFIG_WATCHDOG + +/* Optional features */ +#define CONFIG_STM_HWTIMER32 + +/* + * Allow dangerous commands all the time, since we don't have a write protect + * switch. + */ +#define CONFIG_SYSTEM_UNLOCKED + +#ifndef __ASSEMBLER__ + +/* Timer selection */ +#define TIM_CLOCK32 5 + +#include "gpio_signal.h" + +#endif /* !__ASSEMBLER__ */ +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/sweetberry/build.mk b/board/sweetberry/build.mk new file mode 100644 index 0000000000..6b06f2bb8f --- /dev/null +++ b/board/sweetberry/build.mk @@ -0,0 +1,12 @@ +# -*- makefile -*- +# Copyright 2016 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Board specific files build + +CHIP:=stm32 +CHIP_FAMILY:=stm32f4 +CHIP_VARIANT:=stm32f446 + +board-y=board.o diff --git a/board/sweetberry/ec.tasklist b/board/sweetberry/ec.tasklist new file mode 100644 index 0000000000..29696f3744 --- /dev/null +++ b/board/sweetberry/ec.tasklist @@ -0,0 +1,21 @@ +/* Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * List of enabled tasks in the priority order + * + * The first one has the lowest priority. + * + * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and + * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries, + * where : + * 'n' in the name of the task + * 'r' in the main routine of the task + * 'd' in an opaque parameter passed to the routine at startup + * 's' is the stack size in bytes; must be a multiple of 8 + */ +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, VENTI_TASK_STACK_SIZE) diff --git a/board/sweetberry/gpio.inc b/board/sweetberry/gpio.inc new file mode 100644 index 0000000000..b559d8b875 --- /dev/null +++ b/board/sweetberry/gpio.inc @@ -0,0 +1,91 @@ +/* -*- mode:c -*- + * + * Copyright 2016 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Declare symbolic names for all the GPIOs that we care about. + * Note: Those with interrupt handlers must be declared first. */ + +/* Outputs */ +GPIO(MUX_EN_L, PIN(A, 7), GPIO_INPUT) +GPIO(USB_MUX_SEL, PIN(A, 6), GPIO_OUT_HIGH) +GPIO(PHY_RESET, PIN(C, 4), GPIO_INPUT) +GPIO(LED_BLUE, PIN(A, 2), GPIO_ODR_LOW) +GPIO(LED_GRN, PIN(B, 8), GPIO_ODR_LOW) +GPIO(LED_RED, PIN(B, 15), GPIO_ODR_LOW) + +/* Inputs */ +GPIO(GPIO_1, PIN(A, 1), GPIO_INPUT) +GPIO(GPIO_2, PIN(A, 0), GPIO_INPUT) + +/* Clock function */ +GPIO(MCU_TO_PHY_MCO, PIN(C, 9), GPIO_INPUT) + + +/* GPIO to DUT */ +GPIO(DUT_XTAL_STATUS_3V3, PIN(D, 8), GPIO_INPUT) +GPIO(DUT_TO_MCU_1_3V3, PIN(D, 9), GPIO_INPUT) +GPIO(DUT_TO_MCU_2_3V3, PIN(D, 10), GPIO_INPUT) +GPIO(MCU_TO_DUT_INT_3V3, PIN(D, 12), GPIO_INPUT) + +/* I2C pins should be configured as inputs until I2C module is */ +/* initialized. This will avoid driving the lines unintentionally.*/ +GPIO(I2C1_SCL, PIN(B, 6), GPIO_INPUT) +GPIO(I2C1_SDA, PIN(B, 7), GPIO_INPUT) +GPIO(I2C2_SCL, PIN(F, 1), GPIO_INPUT) +GPIO(I2C2_SDA, PIN(F, 0), GPIO_INPUT) +GPIO(I2C3_SCL, PIN(A, 8), GPIO_INPUT) +GPIO(I2C3_SDA, PIN(B, 4), GPIO_INPUT) +GPIO(FMPI2C_SCL, PIN(C, 6), GPIO_INPUT) +GPIO(FMPI2C_SDA, PIN(C, 7), GPIO_INPUT) + +/* USART3 TX/RX */ +GPIO(MCU_UART3_TX, PIN(C, 10), GPIO_INPUT) +GPIO(MCU_UART3_RX, PIN(C, 11), GPIO_INPUT) +/* USART4 TX/RX */ +GPIO(MCU_UART4_TX, PIN(A, 0), GPIO_INPUT) +GPIO(MCU_UART4_RX, PIN(A, 1), GPIO_INPUT) + +/* USB pins */ +GPIO(USB_FS_DM, PIN(A, 11), GPIO_INPUT) +GPIO(USB_FS_DP, PIN(A, 12), GPIO_INPUT) + +GPIO(USB_HS_ULPI_NXT, PIN(C, 3), GPIO_INPUT) +GPIO(USB_HS_ULPI_DIR, PIN(C, 2), GPIO_INPUT) +GPIO(USB_HS_ULPI_STP, PIN(C, 0), GPIO_INPUT) +GPIO(USB_HS_ULPI_CK, PIN(A, 5), GPIO_INPUT) + +GPIO(USB_HS_ULPI_D7, PIN(B, 5), GPIO_INPUT) +GPIO(USB_HS_ULPI_D6, PIN(B,13), GPIO_INPUT) +GPIO(USB_HS_ULPI_D5, PIN(B,12), GPIO_INPUT) +GPIO(USB_HS_ULPI_D4, PIN(B, 2), GPIO_INPUT) +GPIO(USB_HS_ULPI_D3, PIN(B,10), GPIO_INPUT) +GPIO(USB_HS_ULPI_D2, PIN(B, 1), GPIO_INPUT) +GPIO(USB_HS_ULPI_D1, PIN(B, 0), GPIO_INPUT) +GPIO(USB_HS_ULPI_D0, PIN(A, 3), GPIO_INPUT) + + +/* Unimplemented signals since we are not an EC */ +UNIMPLEMENTED(ENTERING_RW) +UNIMPLEMENTED(WP_L) + + +ALTERNATE(PIN_MASK(C, 0x0c00), 7, MODULE_UART, 0) /* USART3: PC10/PC11 - Console */ +ALTERNATE(PIN_MASK(A, 0x0003), 8, MODULE_UART, 0) /* USART4: PA0/PA1 - Console */ + +ALTERNATE(PIN_MASK(B, 0x00c0), 4, MODULE_I2C, GPIO_ODR_HIGH | GPIO_PULL_UP) /* I2C1 MASTER:PB6/7 */ +ALTERNATE(PIN_MASK(F, 0x0003), 4, MODULE_I2C, GPIO_ODR_HIGH | GPIO_PULL_UP) /* I2C2 MASTER:PF1/0 */ +ALTERNATE(PIN_MASK(A, 0x0100), 4, MODULE_I2C, GPIO_ODR_HIGH | GPIO_PULL_UP) /* I2C3 MASTER:PA8 */ +ALTERNATE(PIN_MASK(B, 0x0010), 4, MODULE_I2C, GPIO_ODR_HIGH | GPIO_PULL_UP) /* I2C3 MASTER:PB4 */ +ALTERNATE(PIN_MASK(C, 0x00c0), 4, MODULE_I2C, GPIO_ODR_HIGH | GPIO_PULL_UP) /* FMPI2C MASTER:PC6/7 */ + +/* OTG FS */ +ALTERNATE(PIN_MASK(A, 0x1800), 10, MODULE_USB, 0) /* DWC USB OTG: PA11/12 */ + +/* OTG HS */ +ALTERNATE(PIN_MASK(A, 0x0028), 10, MODULE_USB, 0) /* DWC USB OTG HS */ +ALTERNATE(PIN_MASK(B, 0x3427), 10, MODULE_USB, 0) /* DWC USB OTG HS */ +ALTERNATE(PIN_MASK(C, 0x000d), 10, MODULE_USB, 0) /* DWC USB OTG HS */ +ALTERNATE(PIN_MASK(C, 0x0200), 0, MODULE_MCO, 0) /* MCO2: PC9 */ diff --git a/util/flash_ec b/util/flash_ec index 58e373e02d..f662e236f6 100755 --- a/util/flash_ec +++ b/util/flash_ec @@ -88,6 +88,7 @@ BOARDS_STM32_DFU=( discovery servo_v4 servo_micro + sweetberry stm32f446e-eval ) -- cgit v1.2.1