From 833fbff68e47782ad8bb0e673ea525303902ced1 Mon Sep 17 00:00:00 2001 From: "arthur.lin" Date: Tue, 16 Mar 2021 18:12:34 +0800 Subject: lindar: define GPIO CCD_MODE_ODL Define PIN(E,5) CCD_MODE_ODL to input. BRANCH=firmware-volteer-13672.B BUG=none TEST=make buildall -j Signed-off-by: arthur.lin Change-Id: I5220012d9397dcd235e96a43d1dbeeba4806516a Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2764202 Reviewed-by: Keith Short Commit-Queue: Keith Short Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2774587 Tested-by: Abe Levkoy Reviewed-by: Abe Levkoy Commit-Queue: Abe Levkoy --- board/lindar/gpio.inc | 1 + 1 file changed, 1 insertion(+) diff --git a/board/lindar/gpio.inc b/board/lindar/gpio.inc index b60fb75717..c4f3123ebb 100644 --- a/board/lindar/gpio.inc +++ b/board/lindar/gpio.inc @@ -95,6 +95,7 @@ UNIMPLEMENTED(USB_C1_LS_EN) /* Misc Signals */ GPIO(EC_H1_PACKET_MODE, PIN(7, 5), GPIO_OUT_LOW) /* H1 Packet Mode */ +GPIO(CCD_MODE_ODL, PIN(E, 5), GPIO_INPUT) /* Case Closed Debug Mode */ /* * Determine the polarity of these SSD signals and whether -- cgit v1.2.1