From 89dbca62cb6b01f1242b01a44a8ac41c1cd6d151 Mon Sep 17 00:00:00 2001 From: Nicolas Boichat Date: Mon, 25 May 2020 13:53:35 +0800 Subject: poppy: Disable PU on GPIO10 For NPCX5, when CR_SIN is selected via DEVALTC.UART_SL2, the PU/PD is selected according to GPIO10 configuration (and not according to GPIO64). Also, disable the relevant WKIEN bit for GPIO10. BRANCH=poppy BUG=b:111215677 TEST=Boot soraka Change-Id: Icee01043dcd562f9b72f2097b9a988d5535e0ffc Signed-off-by: Nicolas Boichat Signed-off-by: CHLin Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2214454 (cherry picked from commit e03bbafca5d83361f32233a6bfd09c65702102b6) Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2342953 Reviewed-by: Namyoon Woo --- board/poppy/board.c | 10 ++++++++++ board/poppy/gpio.inc | 2 +- 2 files changed, 11 insertions(+), 1 deletion(-) diff --git a/board/poppy/board.c b/board/poppy/board.c index 6dfb9ab441..84caa7a497 100644 --- a/board/poppy/board.c +++ b/board/poppy/board.c @@ -579,6 +579,16 @@ static void board_init(void) } #endif +#ifndef BOARD_LUX + /* + * see (b/111215677): setting the internal PU/PD of the unused pin + * GPIO10 affects the ball K10 when it is selected to CR_SIN. + * Disabing the WKINEN bit of GPIO10 insteading setting its PU/PD to + * bypass this issue. + */ + NPCX_WKINEN(MIWU_TABLE_1, MIWU_GROUP_2) &= 0xFE; +#endif + /* Enable Gyro interrupts */ gpio_enable_interrupt(GPIO_ACCELGYRO3_INT_L); diff --git a/board/poppy/gpio.inc b/board/poppy/gpio.inc index 940d498a19..286085d39c 100644 --- a/board/poppy/gpio.inc +++ b/board/poppy/gpio.inc @@ -117,7 +117,7 @@ GPIO(PPVAR_VAR_BASE, PIN(1, 2), GPIO_OUT_LOW) #else GPIO(PP3300_DX_BASE, PIN(1, 1), GPIO_OUT_LOW) GPIO(TP_EC_GPIO_07, PIN(0, 7), GPIO_INPUT | GPIO_PULL_UP) -GPIO(TP_EC_GPIO_10, PIN(1, 0), GPIO_INPUT | GPIO_PULL_UP) +GPIO(TP_EC_GPIO_10, PIN(1, 0), GPIO_INPUT) GPIO(TP_EC_GPIO_15, PIN(1, 5), GPIO_INPUT | GPIO_PULL_UP) #endif -- cgit v1.2.1