From a37797b99b45effaefc9e4a3e1b7ceccaf80c739 Mon Sep 17 00:00:00 2001 From: Deepti Deshatty Date: Tue, 16 Nov 2021 16:00:14 +0530 Subject: adlrvp: configure USB_C1_HPD PCA9675 I/O expander gpio Adlrvpn type-c port 1 has Aux switch for usb/dp mode. Switch connects or disconnects type-c port SBU lines to the SoC. USB_C1_HPD controls the Aux usb/dp switch. Hence set USB_C1_HPD to GPIO_OUT_LOW which ensures switch is in closed state. BUG=none BRANCH=none TEST=Verified USB and DP on adlrvpn type-c port1 Signed-off-by: Deepti Deshatty Change-Id: I3f4fb23450bf58bd3cd488c91075b11a5b09abba Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3282977 Reviewed-by: Poornima Tom Reviewed-by: Keith Short Commit-Queue: Keith Short --- baseboard/intelrvp/adlrvp_ioex_gpio.inc | 1 + 1 file changed, 1 insertion(+) diff --git a/baseboard/intelrvp/adlrvp_ioex_gpio.inc b/baseboard/intelrvp/adlrvp_ioex_gpio.inc index e5522b02b3..4519d3d853 100644 --- a/baseboard/intelrvp/adlrvp_ioex_gpio.inc +++ b/baseboard/intelrvp/adlrvp_ioex_gpio.inc @@ -12,6 +12,7 @@ IOEX(USB_C0_USB_MUX_CNTRL_0, EXPIN(IOEX_C0_PCA9675, 0, PCA9675_IO_P05), GPIO_OUT IOEX(USB_C1_BB_RETIMER_RST, EXPIN(IOEX_C1_PCA9675, 0, PCA9675_IO_P00), GPIO_OUT_LOW) IOEX(USB_C1_BB_RETIMER_LS_EN, EXPIN(IOEX_C1_PCA9675, 0, PCA9675_IO_P01), GPIO_OUT_LOW) +IOEX(USB_C1_HPD, EXPIN(IOEX_C1_PCA9675, 0, PCA9675_IO_P02), GPIO_OUT_LOW) IOEX(USB_C0_C1_OC, EXPIN(IOEX_C1_PCA9675, 0, PCA9675_IO_P10), GPIO_OUT_HIGH) #if defined(HAS_TASK_PD_C2) -- cgit v1.2.1