From c121a3287c2917cf2abed497bd22371fabea6474 Mon Sep 17 00:00:00 2001 From: Mulin Chao Date: Thu, 10 Sep 2015 15:37:54 +0800 Subject: nuc: Add initial wheatley board driver Add initial board driver for wheatley platform BUG=chrome-os-partner:34346 TEST=make buildall -j; test nuvoton IC specific drivers BRANCH=none Change-Id: I9dccc284e1de10855079611be8593641d837cd64 Reviewed-on: https://chromium-review.googlesource.com/298743 Commit-Ready: Mulin Chao Tested-by: Mulin Chao Reviewed-by: Randall Spangler --- board/wheatley/Makefile | 1 + board/wheatley/battery.c | 231 +++++++++++++++++++++++ board/wheatley/board.c | 412 +++++++++++++++++++++++++++++++++++++++++ board/wheatley/board.h | 202 ++++++++++++++++++++ board/wheatley/build.mk | 14 ++ board/wheatley/ec.tasklist | 33 ++++ board/wheatley/gpio.inc | 142 ++++++++++++++ board/wheatley/led.c | 165 +++++++++++++++++ board/wheatley/usb_pd_policy.c | 412 +++++++++++++++++++++++++++++++++++++++++ 9 files changed, 1612 insertions(+) create mode 100644 board/wheatley/Makefile create mode 100644 board/wheatley/battery.c create mode 100644 board/wheatley/board.c create mode 100644 board/wheatley/board.h create mode 100644 board/wheatley/build.mk create mode 100644 board/wheatley/ec.tasklist create mode 100644 board/wheatley/gpio.inc create mode 100644 board/wheatley/led.c create mode 100644 board/wheatley/usb_pd_policy.c diff --git a/board/wheatley/Makefile b/board/wheatley/Makefile new file mode 100644 index 0000000000..94aaae2c4d --- /dev/null +++ b/board/wheatley/Makefile @@ -0,0 +1 @@ +../../Makefile \ No newline at end of file diff --git a/board/wheatley/battery.c b/board/wheatley/battery.c new file mode 100644 index 0000000000..4c819dac48 --- /dev/null +++ b/board/wheatley/battery.c @@ -0,0 +1,231 @@ +/* Copyright 2015 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Battery pack vendor provided charging profile + */ + +#include "battery.h" +#include "battery_smart.h" +#include "charge_state.h" +#include "console.h" +#include "ec_commands.h" +#include "i2c.h" +#include "util.h" + +/* Shutdown mode parameter to write to manufacturer access register */ +#define PARAM_CUT_OFF_LOW 0x10 +#define PARAM_CUT_OFF_HIGH 0x00 + +/* Battery info for BQ40Z55 */ +static const struct battery_info info = { + .voltage_max = 8700, /* mV */ + .voltage_normal = 7600, + .voltage_min = 6000, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 46, + .charging_min_c = 0, + .charging_max_c = 60, + .discharging_min_c = 0, + .discharging_max_c = 60, +}; + +const struct battery_info *battery_get_info(void) +{ + return &info; +} + +int board_cut_off_battery(void) +{ + int rv; + uint8_t buf[3]; + + /* Ship mode command must be sent twice to take effect */ + buf[0] = SB_MANUFACTURER_ACCESS & 0xff; + buf[1] = PARAM_CUT_OFF_LOW; + buf[2] = PARAM_CUT_OFF_HIGH; + + i2c_lock(I2C_PORT_BATTERY, 1); + rv = i2c_xfer(I2C_PORT_BATTERY, BATTERY_ADDR, buf, 3, NULL, 0, + I2C_XFER_SINGLE); + rv |= i2c_xfer(I2C_PORT_BATTERY, BATTERY_ADDR, buf, 3, NULL, 0, + I2C_XFER_SINGLE); + i2c_lock(I2C_PORT_BATTERY, 0); + + return rv; +} + +#ifdef CONFIG_CHARGER_PROFILE_OVERRIDE + +static int fast_charging_allowed = 1; + +/* + * This can override the smart battery's charging profile. To make a change, + * modify one or more of requested_voltage, requested_current, or state. + * Leave everything else unchanged. + * + * Return the next poll period in usec, or zero to use the default (which is + * state dependent). + */ +int charger_profile_override(struct charge_state_data *curr) +{ + /* temp in 0.1 deg C */ + int temp_c = curr->batt.temperature - 2731; + /* keep track of last temperature range for hysteresis */ + static enum { + TEMP_RANGE_1, + TEMP_RANGE_2, + TEMP_RANGE_3, + TEMP_RANGE_4, + TEMP_RANGE_5, + } temp_range = TEMP_RANGE_3; + /* keep track of last voltage range for hysteresis */ + static enum { + VOLTAGE_RANGE_LOW, + VOLTAGE_RANGE_HIGH, + } voltage_range = VOLTAGE_RANGE_LOW; + + /* Current and previous battery voltage */ + int batt_voltage; + static int prev_batt_voltage; + + /* + * Determine temperature range. The five ranges are: + * < 10C + * 10-15C + * 15-23C + * 23-45C + * > 45C + * + * Add 0.2 degrees of hysteresis. + * If temp reading was bad, use last range. + */ + if (!(curr->batt.flags & BATT_FLAG_BAD_TEMPERATURE)) { + if (temp_c < 99) + temp_range = TEMP_RANGE_1; + else if (temp_c > 101 && temp_c < 149) + temp_range = TEMP_RANGE_2; + else if (temp_c > 151 && temp_c < 229) + temp_range = TEMP_RANGE_3; + else if (temp_c > 231 && temp_c < 449) + temp_range = TEMP_RANGE_4; + else if (temp_c > 451) + temp_range = TEMP_RANGE_5; + } + + /* + * If battery voltage reading is bad, use the last reading. Otherwise, + * determine voltage range with hysteresis. + */ + if (curr->batt.flags & BATT_FLAG_BAD_VOLTAGE) { + batt_voltage = prev_batt_voltage; + } else { + batt_voltage = prev_batt_voltage = curr->batt.voltage; + if (batt_voltage < 8200) + voltage_range = VOLTAGE_RANGE_LOW; + else if (batt_voltage > 8300) + voltage_range = VOLTAGE_RANGE_HIGH; + } + + /* + * If we are not charging or we aren't using fast charging profiles, + * then do not override desired current and voltage. + */ + if (curr->state != ST_CHARGE || !fast_charging_allowed) + return 0; + + /* + * Okay, impose our custom will: + * When battery is 0-10C: + * CC at 486mA @ 8.7V + * CV at 8.7V + * + * When battery is <15C: + * CC at 1458mA @ 8.7V + * CV at 8.7V + * + * When battery is <23C: + * CC at 3402mA until 8.3V @ 8.7V + * CC at 2430mA @ 8.7V + * CV at 8.7V + * + * When battery is <45C: + * CC at 4860mA until 8.3V @ 8.7V + * CC at 2430mA @ 8.7V + * CV at 8.7V until current drops to 450mA + * + * When battery is >45C: + * CC at 2430mA @ 8.3V + * CV at 8.3V (when battery is hot we don't go to fully charged) + */ + switch (temp_range) { + case TEMP_RANGE_1: + curr->requested_current = 486; + curr->requested_voltage = 8700; + break; + case TEMP_RANGE_2: + curr->requested_current = 1458; + curr->requested_voltage = 8700; + break; + case TEMP_RANGE_3: + curr->requested_voltage = 8700; + if (voltage_range == VOLTAGE_RANGE_HIGH) + curr->requested_current = 2430; + else + curr->requested_current = 3402; + break; + case TEMP_RANGE_4: + curr->requested_voltage = 8700; + if (voltage_range == VOLTAGE_RANGE_HIGH) + curr->requested_current = 2430; + else + curr->requested_current = 4860; + break; + case TEMP_RANGE_5: + curr->requested_current = 2430; + curr->requested_voltage = 8300; + break; + } + + return 0; +} + +/* Customs options controllable by host command. */ +#define PARAM_FASTCHARGE (CS_PARAM_CUSTOM_PROFILE_MIN + 0) + +enum ec_status charger_profile_override_get_param(uint32_t param, + uint32_t *value) +{ + if (param == PARAM_FASTCHARGE) { + *value = fast_charging_allowed; + return EC_RES_SUCCESS; + } + return EC_RES_INVALID_PARAM; +} + +enum ec_status charger_profile_override_set_param(uint32_t param, + uint32_t value) +{ + if (param == PARAM_FASTCHARGE) { + fast_charging_allowed = value; + return EC_RES_SUCCESS; + } + return EC_RES_INVALID_PARAM; +} + +static int command_fastcharge(int argc, char **argv) +{ + if (argc > 1 && !parse_bool(argv[1], &fast_charging_allowed)) + return EC_ERROR_PARAM1; + + ccprintf("fastcharge %s\n", fast_charging_allowed ? "on" : "off"); + + return EC_SUCCESS; +} +DECLARE_CONSOLE_COMMAND(fastcharge, command_fastcharge, + "[on|off]", + "Get or set fast charging profile", + NULL); + +#endif /* CONFIG_CHARGER_PROFILE_OVERRIDE */ diff --git a/board/wheatley/board.c b/board/wheatley/board.c new file mode 100644 index 0000000000..49a11049a3 --- /dev/null +++ b/board/wheatley/board.c @@ -0,0 +1,412 @@ +/* Copyright 2015 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Wheatley board-specific configuration */ + +#include "adc_chip.h" +#include "als.h" +#include "bd99992gw.h" +#include "button.h" +#include "charge_manager.h" +#include "charge_state.h" +#include "charger.h" +#include "chipset.h" +#include "console.h" +#include "driver/als_opt3001.h" +#include "extpower.h" +#include "gpio.h" +#include "hooks.h" +#include "host_command.h" +#include "i2c.h" +#include "keyboard_scan.h" +#include "lid_switch.h" +#include "motion_sense.h" +#include "pi3usb9281.h" +#include "power.h" +#include "power_button.h" +#include "switch.h" +#include "system.h" +#include "task.h" +#include "temp_sensor.h" +#include "timer.h" +#include "uart.h" +#include "usb_charge.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usb_pd_tcpm.h" +#include "util.h" + +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) + +#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP) +#define GPIO_KB_OUTPUT (GPIO_ODR_HIGH) + +#define I2C_ADDR_BD99992 0x60 + +/* Exchange status with PD MCU. */ +static void pd_mcu_interrupt(enum gpio_signal signal) +{ +#ifdef HAS_TASK_PDCMD + /* Exchange status with PD MCU to determine interrupt cause */ + host_command_pd_send_status(0); +#endif +} + +void vbus0_evt(enum gpio_signal signal) +{ + /* VBUS present GPIO is inverted */ + usb_charger_vbus_change(0, !gpio_get_level(signal)); + task_wake(TASK_ID_PD_C0); +} + +void vbus1_evt(enum gpio_signal signal) +{ + /* VBUS present GPIO is inverted */ + usb_charger_vbus_change(1, !gpio_get_level(signal)); + task_wake(TASK_ID_PD_C1); +} + +void usb0_evt(enum gpio_signal signal) +{ + task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12, 0); +} + +void usb1_evt(enum gpio_signal signal) +{ + task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12, 0); +} + +/* + * enable_input_devices() is called by the tablet_mode ISR, but changes the + * state of GPIOs, so its definition must reside after including gpio_list. + */ +static void enable_input_devices(void); + +void tablet_mode_interrupt(enum gpio_signal signal) +{ + hook_call_deferred(enable_input_devices, 0); +} + +#include "gpio_list.h" + +/* power signal list. Must match order of enum power_signal. */ +const struct power_signal_info power_signal_list[] = { + {GPIO_RSMRST_L_PGOOD, 1, "RSMRST_N_PWRGD"}, + {GPIO_PCH_SLP_S0_L, 1, "SLP_S0_DEASSERTED"}, + {GPIO_PCH_SLP_S3_L, 1, "SLP_S3_DEASSERTED"}, + {GPIO_PCH_SLP_S4_L, 1, "SLP_S4_DEASSERTED"}, + {GPIO_PCH_SLP_SUS_L, 1, "SLP_SUS_DEASSERTED"}, + {GPIO_PMIC_DPWROK, 1, "PMIC_DPWROK"}, +}; +BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); + +/* ADC channels */ +const struct adc_t adc_channels[] = { + /* Vbus sensing. Converted to mV, full ADC is equivalent to 33V. */ + [ADC_VBUS] = {"VBUS", NPCX_ADC_CH1, ADC_MAX_VOLT, ADC_READ_MAX+1, 0}, + /* Adapter current output or battery discharging current */ + [ADC_AMON_BMON] = {"AMON_BMON", NPCX_ADC_CH4, 1, 1, 0}, + /* System current consumption */ + [ADC_PSYS] = {"PSYS", NPCX_ADC_CH3, 1, 1, 0}, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); + +const struct i2c_port_t i2c_ports[] = { + {"pmic", NPCX_I2C_PORT0_0, 400, GPIO_I2C0_0_SCL, GPIO_I2C0_0_SDA}, + {"muxes", NPCX_I2C_PORT0_1, 400, GPIO_I2C0_1_SCL, GPIO_I2C0_1_SDA}, + {"pd_mcu", NPCX_I2C_PORT1, 1000, GPIO_I2C1_SCL, GPIO_I2C1_SDA}, + {"sensors", NPCX_I2C_PORT2, 400, GPIO_I2C2_SCL, GPIO_I2C2_SDA}, + {"batt", NPCX_I2C_PORT3, 100, GPIO_I2C3_SCL, GPIO_I2C3_SDA}, +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); + +const enum gpio_signal hibernate_wake_pins[] = { + GPIO_AC_PRESENT, + GPIO_LID_OPEN, + GPIO_POWER_BUTTON_L, +}; + +const int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); + +struct pi3usb9281_config pi3usb9281_chips[] = { + { + .i2c_port = I2C_PORT_USB_CHARGER_1, + .mux_lock = NULL, + }, + { + .i2c_port = I2C_PORT_USB_CHARGER_2, + .mux_lock = NULL, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(pi3usb9281_chips) == + CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT); + +struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_COUNT] = { + { + .port_addr = 0xa8, + .driver = &pi3usb30532_usb_mux_driver, + }, + { + .port_addr = 0x20, + .driver = &ps8740_usb_mux_driver, + } +}; + +/** + * Reset PD MCU + */ +void board_reset_pd_mcu(void) +{ + gpio_set_level(GPIO_PD_RST_L, 0); + usleep(100); + gpio_set_level(GPIO_PD_RST_L, 1); +} + +const struct temp_sensor_t temp_sensors[] = { + {"Battery", TEMP_SENSOR_TYPE_BATTERY, charge_temp_sensor_get_val, 0, 4}, + + /* These BD99992GW temp sensors are only readable in S0 */ + {"Ambient", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val, + BD99992GW_ADC_CHANNEL_SYSTHERM0, 4}, + {"Charger", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val, + BD99992GW_ADC_CHANNEL_SYSTHERM1, 4}, + {"DRAM", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val, + BD99992GW_ADC_CHANNEL_SYSTHERM2, 4}, + {"Wifi", TEMP_SENSOR_TYPE_BOARD, bd99992gw_get_val, + BD99992GW_ADC_CHANNEL_SYSTHERM3, 4}, +}; +BUILD_ASSERT(ARRAY_SIZE(temp_sensors) == TEMP_SENSOR_COUNT); + +/* + * Thermal limits for each temp sensor. All temps are in degrees K. Must be in + * same order as enum temp_sensor_id. To always ignore any temp, use 0. + */ +struct ec_thermal_config thermal_params[] = { + /* {Twarn, Thigh, Thalt}, fan_off, fan_max */ + {{0, 0, 0}, 0, 0}, /* Battery */ + {{0, 0, 0}, 0, 0}, /* Ambient */ + {{0, 0, 0}, 0, 0}, /* Charger */ + {{0, 0, 0}, 0, 0}, /* DRAM */ + {{0, 0, 0}, 0, 0}, /* Wifi */ +}; +BUILD_ASSERT(ARRAY_SIZE(thermal_params) == TEMP_SENSOR_COUNT); + +/* ALS instances. Must be in same order as enum als_id. */ +struct als_t als[] = { + {"TI", opt3001_read_lux, 5}, +}; +BUILD_ASSERT(ARRAY_SIZE(als) == ALS_COUNT); + +const struct button_config buttons[CONFIG_BUTTON_COUNT] = { + { 0 }, + { 0 }, +}; + +static void board_pmic_init(void) +{ + /* No need to re-init PMIC since settings are sticky across sysjump */ + if (system_jumped_to_this_image()) + return; + + /* + * Set V085ACNT / V0.85A Control Register: + * Lower power mode = 0.7V. + * Nominal output = 1.0V. + */ + i2c_write8(I2C_PORT_PMIC, I2C_ADDR_BD99992, 0x38, 0x7a); +} +DECLARE_HOOK(HOOK_INIT, board_pmic_init, HOOK_PRIO_DEFAULT); + +/* Initialize board. */ +static void board_init(void) +{ + /* Enable PD MCU interrupt */ + gpio_enable_interrupt(GPIO_PD_MCU_INT); + /* Enable VBUS interrupt */ + gpio_enable_interrupt(GPIO_USB_C0_VBUS_WAKE_L); + gpio_enable_interrupt(GPIO_USB_C1_VBUS_WAKE_L); + + /* Enable pericom BC1.2 interrupts */ + gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_L); + gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L); + + /* Enable tablet mode interrupt for input device enable */ + gpio_enable_interrupt(GPIO_TABLET_MODE_L); + + /* Provide AC status to the PCH */ + gpio_set_level(GPIO_PCH_ACOK, extpower_is_present()); +} +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); + +/** + * Buffer the AC present GPIO to the PCH. + */ +static void board_extpower(void) +{ + gpio_set_level(GPIO_PCH_ACOK, extpower_is_present()); +} +DECLARE_HOOK(HOOK_AC_CHANGE, board_extpower, HOOK_PRIO_DEFAULT); + +/** + * Set active charge port -- only one port can be active at a time. + * + * @param charge_port Charge port to enable. + * + * Returns EC_SUCCESS if charge port is accepted and made active, + * EC_ERROR_* otherwise. + */ +int board_set_active_charge_port(int charge_port) +{ + /* charge port is a realy physical port */ + int is_real_port = (charge_port >= 0 && + charge_port < CONFIG_USB_PD_PORT_COUNT); + /* check if we are source vbus on that port */ + int source = gpio_get_level(charge_port == 0 ? GPIO_USB_C0_5V_EN : + GPIO_USB_C1_5V_EN); + + if (is_real_port && source) { + CPRINTS("Skip enable p%d", charge_port); + return EC_ERROR_INVAL; + } + + CPRINTS("New chg p%d", charge_port); + + if (charge_port == CHARGE_PORT_NONE) { + /* Disable both ports */ + gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, 1); + gpio_set_level(GPIO_USB_C1_CHARGE_EN_L, 1); + } else { + /* Make sure non-charging port is disabled */ + gpio_set_level(charge_port ? GPIO_USB_C0_CHARGE_EN_L : + GPIO_USB_C1_CHARGE_EN_L, 1); + /* Enable charging port */ + gpio_set_level(charge_port ? GPIO_USB_C1_CHARGE_EN_L : + GPIO_USB_C0_CHARGE_EN_L, 0); + } + + return EC_SUCCESS; +} + +/** + * Set the charge limit based upon desired maximum. + * + * @param charge_ma Desired charge limit (mA). + */ +void board_set_charge_limit(int charge_ma) +{ + charge_set_input_current_limit(MAX(charge_ma, + CONFIG_CHARGER_INPUT_CURRENT)); +} + +/* Enable or disable input devices, based upon chipset state and tablet mode */ +static void enable_input_devices(void) +{ + int kb_enable = 1; + int tp_enable = 1; + + /* Disable both TP and KB in tablet mode */ + if (!gpio_get_level(GPIO_TABLET_MODE_L)) + kb_enable = tp_enable = 0; + /* Disable TP if chipset is off */ + else if (chipset_in_state(CHIPSET_STATE_ANY_OFF)) + tp_enable = 0; + + keyboard_scan_enable(kb_enable, KB_SCAN_DISABLE_LID_ANGLE); + gpio_set_level(GPIO_ENABLE_TOUCHPAD, tp_enable); +} +DECLARE_DEFERRED(enable_input_devices); + +/* Called on AP S5 -> S3 transition */ +static void board_chipset_startup(void) +{ + hook_call_deferred(enable_input_devices, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_STARTUP, board_chipset_startup, HOOK_PRIO_DEFAULT); + +/* Called on AP S3 -> S5 transition */ +static void board_chipset_shutdown(void) +{ + hook_call_deferred(enable_input_devices, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_SHUTDOWN, board_chipset_shutdown, HOOK_PRIO_DEFAULT); + +/* Called on AP S3 -> S0 transition */ +static void board_chipset_resume(void) +{ + gpio_set_level(GPIO_PP1800_DX_AUDIO_EN, 1); + gpio_set_level(GPIO_PP1800_DX_SENSOR_EN, 1); + + /* + * Now that we have enabled the rail to the sensors, let's give enough + * time for the sensors to boot up. Without this delay, the very first + * i2c transactions always fail because the sensors aren't ready yet. + * In testing, a 2ms delay seemed to be reliable, but we'll delay for + * 3ms just to be safe. + * + * Additionally, this hook needs to be run before the motion sense hook + * tries to initialize the sensors. + */ + msleep(3); +} +DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, + MOTION_SENSE_HOOK_PRIO-1); + +/* Called on AP S0 -> S3 transition */ +static void board_chipset_suspend(void) +{ + gpio_set_level(GPIO_PP1800_DX_AUDIO_EN, 0); + gpio_set_level(GPIO_PP1800_DX_SENSOR_EN, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); + +/* Turn off LEDs in hibernate */ +uint32_t board_get_gpio_hibernate_state(uint32_t port, uint32_t pin) +{ + int i; + const uint32_t led_gpios[][2] = { + GPIO_TO_PORT_MASK_PAIR(GPIO_CHARGE_LED_1), + GPIO_TO_PORT_MASK_PAIR(GPIO_CHARGE_LED_2), + }; + + /* LED GPIOs should be driven low to turn off LEDs */ + for (i = 0; i < ARRAY_SIZE(led_gpios); ++i) + if (led_gpios[i][0] == port && led_gpios[i][1] == pin) + return GPIO_OUTPUT | GPIO_LOW; + + /* Other GPIOs should be put in a low-power state */ + return GPIO_INPUT | GPIO_PULL_UP; +} + +/* Any wheatley boards post version 2 should have ROP_LDO_EN stuffed. */ +#define BOARD_MIN_ID_LOD_EN 2 +/* Make the pmic re-sequence the power rails under these conditions. */ +#define PMIC_RESET_FLAGS \ + (RESET_FLAG_WATCHDOG | RESET_FLAG_SOFT | RESET_FLAG_HARD) +static void board_handle_reboot(void) +{ + int flags; + const struct gpio_info *g = &gpio_list[GPIO_BATLOW_L_PMIC_LDO_EN]; + + if (system_jumped_to_this_image()) + return; + + if (system_get_board_version() < BOARD_MIN_ID_LOD_EN) + return; + + /* Interrogate current reset flags from previous reboot. */ + flags = system_get_reset_flags(); + + if (!(flags & PMIC_RESET_FLAGS)) + return; + + ccprintf("Restarting system with PMIC.\n"); + /* Flush console */ + cflush(); + + /* Bring down all rails but RTC rail (including EC power). */ + gpio_set_flags_by_mask(g->port, g->mask, GPIO_OUT_HIGH); +} +DECLARE_HOOK(HOOK_INIT, board_handle_reboot, HOOK_PRIO_FIRST); diff --git a/board/wheatley/board.h b/board/wheatley/board.h new file mode 100644 index 0000000000..2656ddef66 --- /dev/null +++ b/board/wheatley/board.h @@ -0,0 +1,202 @@ +/* Copyright 2015 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Wheatley board configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +/* Optional features */ +#define CONFIG_ADC +#define CONFIG_ALS +#define CONFIG_ALS_OPT3001 +#define CONFIG_BATTERY_CUT_OFF +#define CONFIG_BATTERY_PRESENT_GPIO GPIO_BAT_PRESENT_L +#define CONFIG_BATTERY_SMART +#define CONFIG_BOARD_VERSION +#define CONFIG_BUTTON_COUNT 2 +#define CONFIG_CHARGE_MANAGER + +#define CONFIG_CHARGER +#define CONFIG_CHARGER_V2 + +#define CONFIG_CHARGER_ADC_AMON_BMON +#define CONFIG_CHARGER_DISCHARGE_ON_AC +#define CONFIG_CHARGER_ISL9237 +#define CONFIG_CHARGER_ILIM_PIN_DISABLED +#define CONFIG_CHARGER_INPUT_CURRENT 512 +#define CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON 1 +#define CONFIG_CHARGER_PROFILE_OVERRIDE +#define CONFIG_CHARGER_SENSE_RESISTOR 10 +#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20 + +#define CONFIG_CHIPSET_SKYLAKE +#define CONFIG_CLOCK_CRYSTAL +#define CONFIG_EXTPOWER_GPIO +#define CONFIG_HOSTCMD_PD +#define CONFIG_I2C +#define CONFIG_LPC +#define CONFIG_UART_HOST 0 +#define CONFIG_KEYBOARD_PROTOCOL_8042 +#define CONFIG_LED_COMMON +#define CONFIG_LID_SWITCH +#define CONFIG_PORT80_TASK_EN +#define CONFIG_POWER_BUTTON +#define CONFIG_POWER_BUTTON_X86 +#define CONFIG_POWER_COMMON +#define CONFIG_SCI_GPIO GPIO_PCH_SCI_L +#define CONFIG_USB_CHARGER +#define CONFIG_USB_MUX_PI3USB30532 +#define CONFIG_USB_MUX_PS8740 +#define CONFIG_USB_POWER_DELIVERY +#define CONFIG_USB_PD_ALT_MODE +#define CONFIG_USB_PD_ALT_MODE_DFP +#define CONFIG_USB_PD_CUSTOM_VDM +#define CONFIG_USB_PD_DUAL_ROLE +#define CONFIG_USB_PD_PORT_COUNT 2 +#define CONFIG_USB_PD_TCPM_TCPCI +#define CONFIG_USB_PD_TRY_SRC +#define CONFIG_USB_SWITCH_PI3USB9281 +#define CONFIG_USB_SWITCH_PI3USB9281_CHIP_COUNT 2 +#define CONFIG_USBC_SS_MUX +#define CONFIG_USBC_SS_MUX_DFP_ONLY +#define CONFIG_USBC_VCONN +#define CONFIG_VBOOT_HASH + +#define CONFIG_FLASH_SIZE 0x40000 /* 256 KB Flash used for EC */ +#define CONFIG_SPI_FLASH_W25Q64 + +#define CONFIG_TEMP_SENSOR +#define CONFIG_TEMP_SENSOR_BD99992GW +#define CONFIG_THERMISTOR_NCP15WB + +/* Optional feature - used by nuvoton */ +#define NPCX_I2C0_BUS2 0 /* 0:GPIOB4/B5 1:GPIOB2/B3 as I2C0 */ +#define NPCX_UART_MODULE2 1 /* 0:GPIO10/11 1:GPIO64/65 as UART */ +#define NPCX_JTAG_MODULE2 0 /* 0:GPIO21/17/16/20 1:GPIOD5/E2/D4/E5 as JTAG*/ +#define NPCX_TACH_SEL2 0 /* 0:GPIO40/A4 1:GPIO93/D3 as TACH */ + +/* + * Allow dangerous commands. + * TODO(shawnn): Remove this config before production. + */ +#define CONFIG_SYSTEM_UNLOCKED +#define CONFIG_WATCHDOG_HELP + +#define CONFIG_WIRELESS +#define CONFIG_WIRELESS_SUSPEND \ + (EC_WIRELESS_SWITCH_WLAN | EC_WIRELESS_SWITCH_WLAN_POWER) + +/* Wireless signals */ +#define WIRELESS_GPIO_WLAN GPIO_WLAN_OFF_L +#define WIRELESS_GPIO_WLAN_POWER GPIO_PP3300_WLAN_EN + +/* LED signals */ +#define GPIO_BAT_LED_RED GPIO_CHARGE_LED_1 +#define GPIO_BAT_LED_GREEN GPIO_CHARGE_LED_2 + +/* I2C ports */ +#define I2C_PORT_PMIC NPCX_I2C_PORT0_0 +/* TODO(shawnn): Verify that the charge detectors aren't swapped */ +#define I2C_PORT_USB_CHARGER_1 NPCX_I2C_PORT0_0 +#define I2C_PORT_USB_MUX NPCX_I2C_PORT0_1 +#define I2C_PORT_USB_CHARGER_2 NPCX_I2C_PORT0_1 +#define I2C_PORT_PD_MCU NPCX_I2C_PORT1 +#define I2C_PORT_TCPC NPCX_I2C_PORT1 +#define I2C_PORT_ALS NPCX_I2C_PORT2 +#define I2C_PORT_ACCEL NPCX_I2C_PORT2 +#define I2C_PORT_BATTERY NPCX_I2C_PORT3 +#define I2C_PORT_CHARGER NPCX_I2C_PORT3 + +/* Thermal sensors read through PMIC ADC interface */ +#define I2C_PORT_THERMAL I2C_PORT_PMIC + +/* Ambient Light Sensor address */ +#define OPT3001_I2C_ADDR OPT3001_I2C_ADDR1 + +/* Modules we want to exclude */ +#undef CONFIG_PECI +#undef CONFIG_CMD_HASH +#undef CONFIG_CMD_I2C_SCAN +#undef CONFIG_CMD_KEYBOARD +#undef CONFIG_CMD_TEMP_SENSOR +#undef CONFIG_CMD_TIMERINFO +#undef CONFIG_CONSOLE_CMDHELP +#undef CONFIG_CONSOLE_HISTORY + +#undef DEFERRABLE_MAX_COUNT +#define DEFERRABLE_MAX_COUNT 14 + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" +#include "registers.h" + +/* ADC signal */ +enum adc_channel { + ADC_VBUS, + ADC_AMON_BMON, + ADC_PSYS, + /* Number of ADC channels */ + ADC_CH_COUNT +}; + +/* power signal definitions */ +enum power_signal { + X86_RSMRST_L_PWRGD = 0, + X86_SLP_S0_DEASSERTED, + X86_SLP_S3_DEASSERTED, + X86_SLP_S4_DEASSERTED, + X86_SLP_SUS_DEASSERTED, + X86_PMIC_DPWROK, + + /* Number of X86 signals */ + POWER_SIGNAL_COUNT +}; + +enum temp_sensor_id { + TEMP_SENSOR_BATTERY, + + /* These temp sensors are only readable in S0 */ + TEMP_SENSOR_AMBIENT, + TEMP_SENSOR_CHARGER, + TEMP_SENSOR_DRAM, + TEMP_SENSOR_WIFI, + + TEMP_SENSOR_COUNT +}; + +/* Light sensors */ +enum als_id { + ALS_OPT3001 = 0, + + ALS_COUNT +}; + +/* start as a sink in case we have no other power supply/battery */ +#define PD_DEFAULT_STATE PD_STATE_SNK_DISCONNECTED + +/* TODO: determine the following board specific type-C power constants */ +/* + * delay to turn on the power supply max is ~16ms. + * delay to turn off the power supply max is about ~180ms. + */ +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ + +/* Define typical operating power and max power */ +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_POWER_MW 60000 +#define PD_MAX_CURRENT_MA 3000 + +/* Try to negotiate to 20V since i2c noise problems should be fixed. */ +#define PD_MAX_VOLTAGE_MV 20000 + +/* Reset PD MCU */ +void board_reset_pd_mcu(void); + +#endif /* !__ASSEMBLER__ */ + +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/wheatley/build.mk b/board/wheatley/build.mk new file mode 100644 index 0000000000..1b835dd2da --- /dev/null +++ b/board/wheatley/build.mk @@ -0,0 +1,14 @@ +# -*- makefile -*- +# Copyright 2015 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Board specific files build +# + +# the IC is Nuvoton M-Series EC +CHIP:=npcx + +board-y=board.o led.o +board-$(CONFIG_BATTERY_SMART)+=battery.o +board-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o diff --git a/board/wheatley/ec.tasklist b/board/wheatley/ec.tasklist new file mode 100644 index 0000000000..dae29ca2af --- /dev/null +++ b/board/wheatley/ec.tasklist @@ -0,0 +1,33 @@ +/* Copyright 2015 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* + * List of enabled tasks in the priority order + * + * The first one has the lowest priority. + * + * For each task, use the macro TASK_ALWAYS(n, r, d, s) for base tasks and + * TASK_NOTEST(n, r, d, s) for tasks that can be excluded in test binaries, + * where : + * 'n' in the name of the task + * 'r' in the main routine of the task + * 'd' in an opaque parameter passed to the routine at startup + * 's' is the stack size in bytes; must be a multiple of 8 + */ +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(ALS, als_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P0, usb_charger_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P1, usb_charger_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYPROTO, keyboard_protocol_task, NULL, TASK_STACK_SIZE) \ + TASK_NOTEST(PDCMD, pd_command_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(HOSTCMD, host_command_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(POWERBTN, power_button_task, NULL, TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, LARGER_TASK_STACK_SIZE) diff --git a/board/wheatley/gpio.inc b/board/wheatley/gpio.inc new file mode 100644 index 0000000000..5cfa6c41bf --- /dev/null +++ b/board/wheatley/gpio.inc @@ -0,0 +1,142 @@ +/* -*- mode:c -*- + * + * Copyright 2015 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +GPIO_INT(LID_OPEN, PIN(9, 5), GPIO_INT_BOTH | GPIO_PULL_UP, lid_interrupt) /* B34 ->A47 SPIP_MISO for LID_OPEN_EC (CR_SOUT) */ +GPIO_INT(AC_PRESENT, PIN(7, 3), GPIO_INT_BOTH, extpower_interrupt) /* B39 - PS2_CLK3/TA2 for EC_PCH_ACPRESENT */ +GPIO_INT(WP_L, PIN(7, 1), GPIO_INT_BOTH, switch_interrupt) /* B35 ->B38 PS2_DAT3/TB2 for EC_WP_L (GPO66/ARM#_x86) */ +/* Buffered power button input from PMIC / ROP_EC_PWR_BTN_L_R */ +GPIO_INT(POWER_BUTTON_L, PIN(9, 7), GPIO_INT_BOTH, power_button_interrupt) /* A32 ->A48 GPIO97 for ROP_EC_PWR_BTN_L_R (CR_SIN) */ +/* RSMRST from PMIC */ +GPIO_INT(RSMRST_L_PGOOD, PIN(7, 2), GPIO_INT_BOTH, power_signal_interrupt) /* A36 - PWRGD for ROP_EC_RSMRST_L */ +GPIO_INT(PCH_SLP_S4_L, PIN(E, 0), GPIO_INT_BOTH, power_signal_interrupt) /* A24 - GPIOE0 for SLP_S4_L */ +GPIO_INT(PCH_SLP_S3_L, PIN(4, 0), GPIO_INT_BOTH, power_signal_interrupt) /* A21 ->B21 TA1 for SLP_S3_L (ADC3) */ +/* + * This pulldown should be removed in future hardware followers. The signal + * is pulled up in the SoC when the primary rails are on and/or ramping. + * In order to not get interrupt storms there should be external logic + * which makes this a true binary signal into the EC. + */ +GPIO_INT(PCH_SLP_S0_L, PIN(D, 7), GPIO_INT_BOTH | GPIO_PULL_DOWN, power_signal_interrupt) /* A18 - GPIOD7 for SLP_S0_L */ +GPIO_INT(PCH_SLP_SUS_L, PIN(B, 1), GPIO_INT_BOTH, power_signal_interrupt) /* A54 - KSO17 for SLP_SUS_L_PCH */ +GPIO_INT(VOLUME_UP_L, PIN(0, 0), GPIO_INT_FALLING | GPIO_PULL_UP, button_interrupt) /* A16 ->B68 GPIO00 for VOLUME_UP_L (GPO32/TRIS#) */ +GPIO_INT(VOLUME_DOWN_L, PIN(7, 0), GPIO_INT_FALLING | GPIO_PULL_UP, button_interrupt) /* B36 - PS2_DAT0 for VOLUME_DOWN_L */ +GPIO_INT(PMIC_INT_L, PIN(6, 2), GPIO_INT_FALLING, power_signal_interrupt) /* A31 - PS2_CLK1 for ROP_INT_L */ +GPIO_INT(PD_MCU_INT, PIN(0, 2), GPIO_INT_FALLING | GPIO_PULL_UP, pd_mcu_interrupt) /* A01 - GPIO02 for USB_MCU_EC_INT */ +GPIO_INT(USB_C0_VBUS_WAKE_L, PIN(A, 7), GPIO_INT_BOTH, vbus0_evt) /* B56 - PS2_DAT3/TB2/F_DIO3 for USB_C0_VBUS_DET_L */ +GPIO_INT(USB_C1_VBUS_WAKE_L, PIN(E, 1), GPIO_INT_BOTH, vbus1_evt) /* B30 - GPIOE1 for USB_C1_VBUS_DET_L */ +GPIO_INT(USB_C0_BC12_INT_L, PIN(8, 5), GPIO_INT_FALLING, usb0_evt) /* B50 ->A43 RXD for USB_C0_BC12_INT_L (F_DIO1) */ +GPIO_INT(USB_C1_BC12_INT_L, PIN(9, 4), GPIO_INT_FALLING, usb1_evt) /* B49 - GPIO94 for USB_C1_BC12_INT_L */ +GPIO_INT(TABLET_MODE_L, PIN(E, 7), GPIO_INT_BOTH | GPIO_PULL_UP, tablet_mode_interrupt) /* B53 ->B37 32KCLKIN for TABLET_MODE_EC (F_SCLK) */ + +/* Delayed PWR_OK from PMIC */ +GPIO_INT(PMIC_DPWROK, PIN(C, 3), GPIO_INT_BOTH, power_signal_interrupt) /* A60 - PWM0 for ROP_DSW_PWROK_EC */ + +GPIO(PD_RST_L, PIN(7, 4), GPIO_ODR_HIGH) /* A37 - GPIO74 for USB_PD_RST_L */ +GPIO(USB2_OTG_ID, PIN(7, 5), GPIO_ODR_LOW) /* B40 - 32KHZ_OUT for USB2_OTG_ID */ +/* I2C pins - these will be reconfigured for alternate function below */ +GPIO(I2C0_0_SCL, PIN(B, 5), GPIO_INPUT) /* A56 - I2C0_SCL0 for EC_I2C00_PMIC_TYPEC_SCL */ +GPIO(I2C0_0_SDA, PIN(B, 4), GPIO_INPUT) /* B59 - I2C0_SDA0 for EC_I2C00_PMIC_TYPEC_SDA */ +GPIO(I2C0_1_SCL, PIN(B, 3), GPIO_INPUT) /* A55 - I2C0_SCL1 for EC_I2C01_MUX_SCL */ +GPIO(I2C0_1_SDA, PIN(B, 2), GPIO_INPUT) /* B58 - I2C0_SDA1 for EC_I2C01_MUX_SDA */ +GPIO(I2C1_SCL, PIN(9, 0), GPIO_INPUT) /* B47 - I2C1_SCL0 for EC_I2C1_PD_SCL */ +GPIO(I2C1_SDA, PIN(8, 7), GPIO_INPUT) /* A44 - I2C1_SDA0 for EC_I2C1_PD_SDA */ +GPIO(I2C2_SCL, PIN(9, 2), GPIO_INPUT) /* B48 - I2C2_SCL0 for EC_I2C2_SENSOR_3V3_SCL */ +GPIO(I2C2_SDA, PIN(9, 1), GPIO_INPUT) /* A45 - I2C2_SDA0 for EC_I2C2_SENSOR_3V3_SDA */ +GPIO(I2C3_SCL, PIN(D, 1), GPIO_INPUT) /* A63 - I2C3_SCL0 for EC_I2C3_POWER_SCL */ +GPIO(I2C3_SDA, PIN(D, 0), GPIO_INPUT) /* B66 - I2C3_SDA0 for EC_I2C3_POWER_SDA */ +GPIO(PCH_SCI_L, PIN(7, 6), GPIO_ODR_HIGH) /* A38 - SCI# for EC_SCI_L */ +/* KB BL PWM, only connected to TP */ +GPIO(PWM_KBLIGHT, PIN(C, 4), GPIO_OUT_LOW) /* B64 - PWM2 for KB_BL_PWM */ +GPIO(USB1_ENABLE, PIN(3, 2), GPIO_OUT_LOW) /* B68 ->A16 TRIS# for EN_USB_A0_PWR (GPIO00) */ +GPIO(USB2_ENABLE, PIN(D, 4), GPIO_OUT_LOW) /* B08 - JTAG_TDO1 for EN_USB_A1_PWR */ +GPIO(ENTERING_RW, PIN(6, 0), GPIO_OUT_LOW) /* A30 - PWM7 for EC_ENTERING_RW */ +GPIO(PCH_SMI_L, PIN(C, 6), GPIO_ODR_HIGH) /* B65 - SMI# for EC_SMI_L */ +GPIO(PCH_PWRBTN_L, PIN(A, 5), GPIO_OUTPUT) /* A51 - A20M for EC_PCH_PWR_BTN_L */ +GPIO(USB_C0_DP_HPD, PIN(6, 7), GPIO_OUT_LOW) /* A33 - PS2_CLK0 for USB_C0_DP_HPD */ +GPIO(USB_C1_DP_HPD, PIN(3, 7), GPIO_OUT_LOW) /* B20 - PS2_CLK2 for USB_C1_DP_HPD */ +GPIO(CPU_PROCHOT, PIN(3, 4), GPIO_OUT_LOW) /* B18 - PS2_DAT2 for EC_PCH_PROCHOT */ +GPIO(ENABLE_TOUCHPAD, PIN(A, 6), GPIO_OUT_LOW) /* B55 - PS2_CLK3/TA2/F_CS1# for TP_SHDN_L */ +GPIO(BAT_PRESENT_L, PIN(4, 5), GPIO_INPUT) /* B24 - ADC0 for EC_BATT_TMP */ +GPIO(USB_PD_WAKE, PIN(4, 3), GPIO_OUT_LOW) /* B23 - ADC2 for USB_PD_WAKE */ +/* When asserted, ME does not lock security descriptor */ +GPIO(PCH_SEC_DISABLE_L, PIN(6, 3), GPIO_OUT_HIGH) /* B33 - PS2_DAT1 for FLASH_SECURITY_DISABLE_L */ +GPIO(PCH_WAKE_L, PIN(3, 5), GPIO_ODR_HIGH) /* A62 ->A17 - GPIO35/TEST# for EC_PCH_WAKE_L */ +GPIO(EC_FAN1_TTACH, PIN(9, 3), GPIO_INPUT | GPIO_PULL_UP) /* A46 - TA1/F_DIO2 for EC_FAN1_TACH (testing only) */ +/* Fan PWM output - NC / testing only */ +GPIO(EC_FAN1_PWM, PIN(C, 2), GPIO_OUT_LOW) /* A59 - PWM1 for EC_FAN1_PWM */ +GPIO(PCH_ACOK, PIN(B, 0), GPIO_OUT_LOW) /* B57 - GPIOB0 for ROP_EC_ACOK */ +/* Interrupts from accelerometer / gyro -- not yet implemented */ +GPIO(ACCEL1_INT, PIN(A, 3), GPIO_INPUT) /* A50 - SPIP_MOSI for ACCEL1_INT_L */ +GPIO(ACCEL2_INT, PIN(3, 3), GPIO_INPUT) /* B17 - GPIO33 for ACCEL2_INT_L */ +GPIO(ACCEL3_INT, PIN(8, 6), GPIO_INPUT) /* A17 ->B46 TXD/F_CS1# for ACCELGYRO3_INT_L (GPO35/TEST#) */ +GPIO(WLAN_OFF_L, PIN(5, 0), GPIO_OUT_LOW) /* A17 ->A25 GPO50 for WLAN_OFF_L */ +/* RCIN# line to PCH for 8042 emulation */ +GPIO(PCH_RCIN_L, PIN(C, 5), GPIO_ODR_HIGH) /* A61 - KBRST# for EC_PCH_RCIN_L */ +GPIO(USB2_OTG_VBUSSENSE, PIN(D, 2), GPIO_OUT_LOW) /* B54 ->B67 GPIOD2 for USB2_OTG_VBUSSENSE (F_DIO0) */ +GPIO(PCH_RSMRST_L, PIN(8, 4), GPIO_OUT_LOW) /* B45 - GPIO84 for RSMRST_L */ +/* prochot input from devices */ +GPIO(PLATFORM_EC_PROCHOT, PIN(3, 6), GPIO_INPUT | GPIO_PULL_UP) /* B19 - GPIO36 for PLATFORM_EC_PROCHOT */ +GPIO(USB_C0_5V_EN, PIN(0, 1), GPIO_OUT_LOW) /* B60 ->B01 GPIO01 for EN_USB_C0_5V_OUT (GPOB6/PWM4/Eng_Strap#) */ +GPIO(USB_C1_5V_EN, PIN(E, 5), GPIO_OUT_LOW) /* B62 - JTAG_TMS1 for EN_USB_C1_5V_OUT */ +GPIO(USB_C0_CHARGE_EN_L, PIN(D, 3), GPIO_OUT_LOW) /* A64 - TB1 for EN_USB_C0_CHARGE_EC_L */ +GPIO(PP1800_DX_SENSOR_EN, PIN(0, 3), GPIO_OUT_LOW) /* B02 - KSO16 for EN_PP1800_DX_SENSOR */ +/* From lid sensor */ +GPIO(ENABLE_BACKLIGHT, PIN(E, 2), GPIO_OUT_LOW) /* A41 - JTAG_TDI1 for EC_BL_DISABLE_L */ +GPIO(PP3300_WLAN_EN, PIN(E, 4), GPIO_OUT_LOW) /* A52 - GPIOE4 for EN_PP3300_DX_WLAN */ +GPIO(BOARD_VERSION1, PIN(0, 4), GPIO_INPUT) /* A02 - KSO13 for EC_BRD_ID1 */ +GPIO(BOARD_VERSION2, PIN(8, 2), GPIO_INPUT) /* B43 - KSO14 for EC_BRD_ID2 */ +GPIO(BOARD_VERSION3, PIN(8, 3), GPIO_INPUT) /* B44 - KSO15 for EC_BRD_ID3 */ +GPIO(SYS_RESET_L, PIN(6, 1), GPIO_ODR_HIGH) /* B32 - PWROFF# for SYS_RESET_L */ + +/* + * TODO(crosbug.com/p/40848): These LEDs should be under control of the mec1322 + * LED control unit. Remove these GPIO definitions once the LED control unit + * is functional. + */ +GPIO(CHARGE_LED_1, PIN(B, 7), GPIO_OUT_LOW) /* A57 - PWM5 for CHARGE_LED1 */ +GPIO(CHARGE_LED_2, PIN(C, 0), GPIO_OUT_LOW) /* B61 - PWM6 for CHARGE_LED2 */ + +/* + * BATLOW_L and ROP_LDO_EN are stuffing options. Set as input to dynamically + * handle the stuffing option based on board id. As both signals have external + * pulls setting this pin as input won't harm anything. + */ +GPIO(BATLOW_L_PMIC_LDO_EN, PIN(D, 5), GPIO_ODR_HIGH) /* A08 - JTAG_TCK1 for BATLOW_PLATFORM_RST */ +GPIO(ACCEL4_INT, PIN(A, 1), GPIO_INPUT) /* A49 - SPIP_SCLK for ACCELGYRO4_INT_L */ +GPIO(PP1800_DX_AUDIO_EN, PIN(8, 0), GPIO_OUT_LOW) /* A39 - PWM3 for EN_PP1800_DX_AUDIO */ +/* NC / stuffing option */ +GPIO(PCH_RTCRST, PIN(C, 1), GPIO_INPUT | GPIO_PULL_UP) /* A58 - GPIOC1 for EC_PCH_RTCRST */ +GPIO(PMIC_SLP_SUS_L, PIN(E, 3), GPIO_OUT_LOW) /* B51 - GPIOE3 for SLP_SUS_L_PMIC */ +GPIO(USB_C1_CHARGE_EN_L, PIN(C, 7), GPIO_OUT_LOW) /* B09 ->A62 - GPIOC7 for EN_USB_C1_CHARGE_EC_L */ + +/* Alternate functions GPIO definitions */ + +/* UART pins */ +#if NPCX_UART_MODULE2 +ALTERNATE(PIN_MASK(6, 0x30), 1, MODULE_UART, 0) /* CR_SIN/SOUT for UART GPIO64/65 */ +#else +ALTERNATE(PIN_MASK(1, 0x03), 1, MODULE_UART, 0) /* CR_SIN/SOUT for UART GPIO10/11 */ +#endif + +/* SPI pins */ +ALTERNATE(PIN_MASK(A, 0x0A), 1, MODULE_SPI, 0) /* SPIP_MOSI/SPIP_SCLK for SPI GPIOA3/A1 */ +ALTERNATE(PIN_MASK(9, 0x20), 1, MODULE_SPI, 0) /* SPIP_MISO for SPI GPIO95 */ + +/* I2C pins */ +ALTERNATE(PIN_MASK(B, 0x0C), 1, MODULE_I2C, 0) /* I2C0SDA1/I2C0SCL1 for I2C GPIOB2/B3 */ +ALTERNATE(PIN_MASK(B, 0x30), 1, MODULE_I2C, 0) /* I2C0SDA0/I2C0SCL0 for I2C GPIOB4/B5 */ +ALTERNATE(PIN_MASK(8, 0x80), 1, MODULE_I2C, 0) /* I2C1SDA for I2C GPIO87 */ +ALTERNATE(PIN_MASK(9, 0x07), 1, MODULE_I2C, 0) /* I2C1SCL/I2C2SDA/I2C2SCL for I2C GPIO90/91/92 */ +ALTERNATE(PIN_MASK(D, 0x03), 1, MODULE_I2C, 0) /* I2C3SDA/I2C3SCL for I2C GPIOD0/D1 */ + +/* ADC pins */ +ALTERNATE(PIN_MASK(4, 0x16), 1, MODULE_ADC, 0) /* ADC1/ADC3/ADC4 for ADC GPIO44/42/41 */ + +/* LED1 - GPIOB7. LED2 - GPIOC0 */ +ALTERNATE(PIN_MASK(B, 0x80), 3, MODULE_POWER_LED, 0) /* PWM5 for CHARGE_LED1 */ +ALTERNATE(PIN_MASK(C, 0x01), 3, MODULE_POWER_LED, 0) /* PWM6 for CHARGE_LED2 */ + diff --git a/board/wheatley/led.c b/board/wheatley/led.c new file mode 100644 index 0000000000..451942def7 --- /dev/null +++ b/board/wheatley/led.c @@ -0,0 +1,165 @@ +/* Copyright 2015 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Power and battery LED control for Wheatley. + */ + +#include "battery.h" +#include "charge_state.h" +#include "chipset.h" +#include "ec_commands.h" +#include "gpio.h" +#include "hooks.h" +#include "host_command.h" +#include "led_common.h" +#include "util.h" + +#define BAT_LED_ON 1 +#define BAT_LED_OFF 0 + +#define CRITICAL_LOW_BATTERY_PERCENTAGE 3 +#define LOW_BATTERY_PERCENTAGE 10 + +#define LED_TOTAL_4SECS_TICKS 16 +#define LED_TOTAL_2SECS_TICKS 8 +#define LED_ON_1SEC_TICKS 4 +#define LED_ON_2SECS_TICKS 8 + +const enum ec_led_id supported_led_ids[] = { + EC_LED_ID_BATTERY_LED}; + +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +enum led_color { + LED_OFF = 0, + LED_RED, + LED_AMBER, + LED_GREEN, + LED_COLOR_COUNT /* Number of colors, not a color itself */ +}; + +static int bat_led_set_color(enum led_color color) +{ + switch (color) { + case LED_OFF: + gpio_set_level(GPIO_BAT_LED_RED, BAT_LED_OFF); + gpio_set_level(GPIO_BAT_LED_GREEN, BAT_LED_OFF); + break; + case LED_RED: + gpio_set_level(GPIO_BAT_LED_RED, BAT_LED_ON); + gpio_set_level(GPIO_BAT_LED_GREEN, BAT_LED_OFF); + break; + case LED_AMBER: + gpio_set_level(GPIO_BAT_LED_RED, BAT_LED_ON); + gpio_set_level(GPIO_BAT_LED_GREEN, BAT_LED_ON); + break; + case LED_GREEN: + gpio_set_level(GPIO_BAT_LED_RED, BAT_LED_OFF); + gpio_set_level(GPIO_BAT_LED_GREEN, BAT_LED_ON); + break; + default: + return EC_ERROR_UNKNOWN; + } + return EC_SUCCESS; +} + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + brightness_range[EC_LED_COLOR_RED] = 1; + brightness_range[EC_LED_COLOR_GREEN] = 1; +} + +static int wheatley_led_set_color_battery(enum led_color color) +{ + return bat_led_set_color(color); +} + +static int wheatley_led_set_color(enum ec_led_id led_id, enum led_color color) +{ + int rv; + + led_auto_control(led_id, 0); + switch (led_id) { + case EC_LED_ID_BATTERY_LED: + rv = wheatley_led_set_color_battery(color); + break; + default: + return EC_ERROR_UNKNOWN; + } + return rv; +} + +int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) +{ + if (brightness[EC_LED_COLOR_RED] != 0 && + brightness[EC_LED_COLOR_GREEN] != 0) + wheatley_led_set_color(led_id, LED_AMBER); + else if (brightness[EC_LED_COLOR_RED] != 0) + wheatley_led_set_color(led_id, LED_RED); + else if (brightness[EC_LED_COLOR_GREEN] != 0) + wheatley_led_set_color(led_id, LED_GREEN); + else + wheatley_led_set_color(led_id, LED_OFF); + + return EC_SUCCESS; +} + +static void wheatley_led_set_battery(void) +{ + static int battery_ticks; + uint32_t chflags = charge_get_flags(); + + battery_ticks++; + + /* BAT LED behavior: + * Same as the chromeos spec + * Green/Amber for CHARGE_FLAG_FORCE_IDLE + */ + switch (charge_get_state()) { + case PWR_STATE_CHARGE: + wheatley_led_set_color_battery(LED_AMBER); + break; + case PWR_STATE_DISCHARGE: + /* Less than 3%, blink one second every two second */ + if (charge_get_percent() < CRITICAL_LOW_BATTERY_PERCENTAGE) + wheatley_led_set_color_battery( + (battery_ticks % LED_TOTAL_2SECS_TICKS < + LED_ON_1SEC_TICKS) ? LED_AMBER : LED_OFF); + /* Less than 10%, blink one second every four seconds */ + else if (charge_get_percent() < LOW_BATTERY_PERCENTAGE) + wheatley_led_set_color_battery( + (battery_ticks % LED_TOTAL_4SECS_TICKS < + LED_ON_1SEC_TICKS) ? LED_AMBER : LED_OFF); + else + wheatley_led_set_color_battery(LED_OFF); + break; + case PWR_STATE_ERROR: + wheatley_led_set_color_battery( + (battery_ticks % LED_TOTAL_2SECS_TICKS < + LED_ON_1SEC_TICKS) ? LED_RED : LED_OFF); + break; + case PWR_STATE_CHARGE_NEAR_FULL: + wheatley_led_set_color_battery(LED_GREEN); + break; + case PWR_STATE_IDLE: /* External power connected in IDLE */ + if (chflags & CHARGE_FLAG_FORCE_IDLE) + wheatley_led_set_color_battery( + (battery_ticks % LED_TOTAL_4SECS_TICKS < + LED_ON_2SECS_TICKS) ? LED_GREEN : LED_AMBER); + else + wheatley_led_set_color_battery(LED_GREEN); + break; + default: + /* Other states don't alter LED behavior */ + break; + } +} + +/** * Called by hook task every 1 sec */ +static void led_second(void) +{ + if (led_auto_control_is_enabled(EC_LED_ID_BATTERY_LED)) + wheatley_led_set_battery(); +} +DECLARE_HOOK(HOOK_SECOND, led_second, HOOK_PRIO_DEFAULT); diff --git a/board/wheatley/usb_pd_policy.c b/board/wheatley/usb_pd_policy.c new file mode 100644 index 0000000000..57154978fa --- /dev/null +++ b/board/wheatley/usb_pd_policy.c @@ -0,0 +1,412 @@ +/* Copyright 2015 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "atomic.h" +#include "charge_manager.h" +#include "common.h" +#include "console.h" +#include "gpio.h" +#include "hooks.h" +#include "host_command.h" +#include "registers.h" +#include "system.h" +#include "task.h" +#include "timer.h" +#include "util.h" +#include "usb_mux.h" +#include "usb_pd.h" + +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) + +#define PDO_FIXED_FLAGS (PDO_FIXED_DUAL_ROLE | PDO_FIXED_DATA_SWAP) + +/* TODO: fill in correct source and sink capabilities */ +const uint32_t pd_src_pdo[] = { + PDO_FIXED(5000, 1500, PDO_FIXED_FLAGS), +}; +const int pd_src_pdo_cnt = ARRAY_SIZE(pd_src_pdo); + +const uint32_t pd_snk_pdo[] = { + PDO_FIXED(5000, 500, PDO_FIXED_FLAGS), + PDO_BATT(5000, 20000, 15000), + PDO_VAR(5000, 20000, 3000), +}; +const int pd_snk_pdo_cnt = ARRAY_SIZE(pd_snk_pdo); + +int pd_is_valid_input_voltage(int mv) +{ + return 1; +} + +int pd_check_requested_voltage(uint32_t rdo) +{ + int max_ma = rdo & 0x3FF; + int op_ma = (rdo >> 10) & 0x3FF; + int idx = rdo >> 28; + uint32_t pdo; + uint32_t pdo_ma; + + if (!idx || idx > pd_src_pdo_cnt) + return EC_ERROR_INVAL; /* Invalid index */ + + /* check current ... */ + pdo = pd_src_pdo[idx - 1]; + pdo_ma = (pdo & 0x3ff); + if (op_ma > pdo_ma) + return EC_ERROR_INVAL; /* too much op current */ + if (max_ma > pdo_ma) + return EC_ERROR_INVAL; /* too much max current */ + + CPRINTF("Requested %d V %d mA (for %d/%d mA)\n", + ((pdo >> 10) & 0x3ff) * 50, (pdo & 0x3ff) * 10, + ((rdo >> 10) & 0x3ff) * 10, (rdo & 0x3ff) * 10); + + return EC_SUCCESS; +} + +void pd_transition_voltage(int idx) +{ + /* No-operation: we are always 5V */ +} + +int pd_set_power_supply_ready(int port) +{ + /* Disable charging */ + gpio_set_level(port ? GPIO_USB_C1_CHARGE_EN_L : + GPIO_USB_C0_CHARGE_EN_L, 1); + /* Provide VBUS */ + gpio_set_level(port ? GPIO_USB_C1_5V_EN : + GPIO_USB_C0_5V_EN, 1); + + return EC_SUCCESS; /* we are ready */ +} + +void pd_power_supply_reset(int port) +{ + /* Disable VBUS */ + gpio_set_level(port ? GPIO_USB_C1_5V_EN : + GPIO_USB_C0_5V_EN, 0); + + /* notify host of power info change */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +void pd_set_input_current_limit(int port, uint32_t max_ma, + uint32_t supply_voltage) +{ +#ifdef CONFIG_CHARGE_MANAGER + struct charge_port_info charge; + charge.current = max_ma; + charge.voltage = supply_voltage; + charge_manager_update_charge(CHARGE_SUPPLIER_PD, port, &charge); +#endif + /* notify host of power info change */ +} + +void typec_set_input_current_limit(int port, uint32_t max_ma, + uint32_t supply_voltage) +{ +#ifdef CONFIG_CHARGE_MANAGER + struct charge_port_info charge; + charge.current = max_ma; + charge.voltage = supply_voltage; + charge_manager_update_charge(CHARGE_SUPPLIER_TYPEC, port, &charge); +#endif + + /* notify host of power info change */ +} + +int pd_snk_is_vbus_provided(int port) +{ + return !gpio_get_level(port ? GPIO_USB_C1_VBUS_WAKE_L : + GPIO_USB_C0_VBUS_WAKE_L); +} + +int pd_board_checks(void) +{ + return EC_SUCCESS; +} + +int pd_check_power_swap(int port) +{ + /* + * Allow power swap as long as we are acting as a dual role device, + * otherwise assume our role is fixed (not in S0 or console command + * to fix our role). + */ + return pd_get_dual_role() == PD_DRP_TOGGLE_ON ? 1 : 0; +} + +int pd_check_data_swap(int port, int data_role) +{ + /* Allow data swap if we are a UFP, otherwise don't allow */ + return (data_role == PD_ROLE_UFP) ? 1 : 0; +} + +void pd_execute_data_swap(int port, int data_role) +{ + /* Do nothing */ +} + +void pd_check_pr_role(int port, int pr_role, int flags) +{ + /* + * If partner is dual-role power and dualrole toggling is on, consider + * if a power swap is necessary. + */ + if ((flags & PD_FLAGS_PARTNER_DR_POWER) && + pd_get_dual_role() == PD_DRP_TOGGLE_ON) { + /* + * If we are a sink and partner is not externally powered, then + * swap to become a source. If we are source and partner is + * externally powered, swap to become a sink. + */ + int partner_extpower = flags & PD_FLAGS_PARTNER_EXTPOWER; + if ((!partner_extpower && pr_role == PD_ROLE_SINK) || + (partner_extpower && pr_role == PD_ROLE_SOURCE)) + pd_request_power_swap(port); + } +} + +void pd_check_dr_role(int port, int dr_role, int flags) +{ + /* If UFP, try to switch to DFP */ + if ((flags & PD_FLAGS_PARTNER_DR_DATA) && dr_role == PD_ROLE_UFP) + pd_request_data_swap(port); +} +/* ----------------- Vendor Defined Messages ------------------ */ +const struct svdm_response svdm_rsp = { + .identity = NULL, + .svids = NULL, + .modes = NULL, +}; + +int pd_custom_vdm(int port, int cnt, uint32_t *payload, + uint32_t **rpayload) +{ + int cmd = PD_VDO_CMD(payload[0]); + uint16_t dev_id = 0; + int is_rw; + + /* make sure we have some payload */ + if (cnt == 0) + return 0; + + switch (cmd) { + case VDO_CMD_VERSION: + /* guarantee last byte of payload is null character */ + *(payload + cnt - 1) = 0; + CPRINTF("version: %s\n", (char *)(payload+1)); + break; + case VDO_CMD_READ_INFO: + case VDO_CMD_SEND_INFO: + /* copy hash */ + if (cnt == 7) { + dev_id = VDO_INFO_HW_DEV_ID(payload[6]); + is_rw = VDO_INFO_IS_RW(payload[6]); + + CPRINTF("DevId:%d.%d SW:%d RW:%d\n", + HW_DEV_ID_MAJ(dev_id), + HW_DEV_ID_MIN(dev_id), + VDO_INFO_SW_DBG_VER(payload[6]), + is_rw); + } else if (cnt == 6) { + /* really old devices don't have last byte */ + pd_dev_store_rw_hash(port, dev_id, payload + 1, + SYSTEM_IMAGE_UNKNOWN); + } + break; + case VDO_CMD_CURRENT: + CPRINTF("Current: %dmA\n", payload[1]); + break; + case VDO_CMD_FLIP: + usb_mux_flip(port); + break; +#ifdef CONFIG_USB_PD_LOGGING + case VDO_CMD_GET_LOG: + pd_log_recv_vdm(port, cnt, payload); + break; +#endif /* CONFIG_USB_PD_LOGGING */ + } + + return 0; +} + +#ifdef CONFIG_USB_PD_ALT_MODE_DFP +static int dp_flags[CONFIG_USB_PD_PORT_COUNT]; +/* DP Status VDM as returned by UFP */ +static uint32_t dp_status[CONFIG_USB_PD_PORT_COUNT]; + +static void svdm_safe_dp_mode(int port) +{ + /* make DP interface safe until configure */ + dp_flags[port] = 0; + dp_status[port] = 0; + usb_mux_set(port, TYPEC_MUX_NONE, + USB_SWITCH_CONNECT, pd_get_polarity(port)); +} + +static int svdm_enter_dp_mode(int port, uint32_t mode_caps) +{ + /* Only enter mode if device is DFP_D capable */ + if (mode_caps & MODE_DP_SNK) { + svdm_safe_dp_mode(port); + return 0; + } + + return -1; +} + +static int svdm_dp_status(int port, uint32_t *payload) +{ + int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT); + payload[0] = VDO(USB_SID_DISPLAYPORT, 1, + CMD_DP_STATUS | VDO_OPOS(opos)); + payload[1] = VDO_DP_STATUS(0, /* HPD IRQ ... not applicable */ + 0, /* HPD level ... not applicable */ + 0, /* exit DP? ... no */ + 0, /* usb mode? ... no */ + 0, /* multi-function ... no */ + (!!(dp_flags[port] & DP_FLAGS_DP_ON)), + 0, /* power low? ... no */ + (!!(dp_flags[port] & DP_FLAGS_DP_ON))); + return 2; +}; + +static int svdm_dp_config(int port, uint32_t *payload) +{ + int opos = pd_alt_mode(port, USB_SID_DISPLAYPORT); + int mf_pref = PD_VDO_DPSTS_MF_PREF(dp_status[port]); + int pin_mode = pd_dfp_dp_get_pin_mode(port, dp_status[port]); + + if (!pin_mode) + return 0; + + usb_mux_set(port, mf_pref ? TYPEC_MUX_DOCK : TYPEC_MUX_DP, + USB_SWITCH_CONNECT, pd_get_polarity(port)); + + payload[0] = VDO(USB_SID_DISPLAYPORT, 1, + CMD_DP_CONFIG | VDO_OPOS(opos)); + payload[1] = VDO_DP_CFG(pin_mode, /* pin mode */ + 1, /* DPv1.3 signaling */ + 2); /* UFP connected */ + return 2; +}; + +#define PORT_TO_HPD(port) ((port) ? GPIO_USB_C1_DP_HPD : GPIO_USB_C0_DP_HPD) +static void svdm_dp_post_config(int port) +{ + dp_flags[port] |= DP_FLAGS_DP_ON; + if (!(dp_flags[port] & DP_FLAGS_HPD_HI_PENDING)) + return; + + gpio_set_level(PORT_TO_HPD(port), 1); +} + +static void hpd0_irq_deferred(void) +{ + gpio_set_level(GPIO_USB_C0_DP_HPD, 1); +} + +static void hpd1_irq_deferred(void) +{ + gpio_set_level(GPIO_USB_C1_DP_HPD, 1); +} + +DECLARE_DEFERRED(hpd0_irq_deferred); +DECLARE_DEFERRED(hpd1_irq_deferred); +#define PORT_TO_HPD_IRQ_DEFERRED(port) ((port) ? hpd1_irq_deferred : \ + hpd0_irq_deferred) + +static int svdm_dp_attention(int port, uint32_t *payload) +{ + int cur_lvl; + int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); + int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]); + enum gpio_signal hpd = PORT_TO_HPD(port); + cur_lvl = gpio_get_level(hpd); + + dp_status[port] = payload[1]; + + /* Its initial DP status message prior to config */ + if (!(dp_flags[port] & DP_FLAGS_DP_ON)) { + if (lvl) + dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING; + return 1; + } + + if (irq & cur_lvl) { + gpio_set_level(hpd, 0); + hook_call_deferred(PORT_TO_HPD_IRQ_DEFERRED(port), + HPD_DSTREAM_DEBOUNCE_IRQ); + } else if (irq & !cur_lvl) { + CPRINTF("ERR:HPD:IRQ&LOW\n"); + return 0; /* nak */ + } else { + gpio_set_level(hpd, lvl); + } + /* ack */ + return 1; +} + +static void svdm_exit_dp_mode(int port) +{ + svdm_safe_dp_mode(port); + gpio_set_level(PORT_TO_HPD(port), 0); +} + +static int svdm_enter_gfu_mode(int port, uint32_t mode_caps) +{ + /* Always enter GFU mode */ + return 0; +} + +static void svdm_exit_gfu_mode(int port) +{ +} + +static int svdm_gfu_status(int port, uint32_t *payload) +{ + /* + * This is called after enter mode is successful, send unstructured + * VDM to read info. + */ + pd_send_vdm(port, USB_VID_GOOGLE, VDO_CMD_READ_INFO, NULL, 0); + return 0; +} + +static int svdm_gfu_config(int port, uint32_t *payload) +{ + return 0; +} + +static int svdm_gfu_attention(int port, uint32_t *payload) +{ + return 0; +} + +const struct svdm_amode_fx supported_modes[] = { + { + .svid = USB_SID_DISPLAYPORT, + .enter = &svdm_enter_dp_mode, + .status = &svdm_dp_status, + .config = &svdm_dp_config, + .post_config = &svdm_dp_post_config, + .attention = &svdm_dp_attention, + .exit = &svdm_exit_dp_mode, + }, + { + .svid = USB_VID_GOOGLE, + .enter = &svdm_enter_gfu_mode, + .status = &svdm_gfu_status, + .config = &svdm_gfu_config, + .attention = &svdm_gfu_attention, + .exit = &svdm_exit_gfu_mode, + } +}; +const int supported_modes_cnt = ARRAY_SIZE(supported_modes); +#endif /* CONFIG_USB_PD_ALT_MODE_DFP */ + -- cgit v1.2.1