From c8d355a2302758ec5a9da10e3d9a7b824ad04b9f Mon Sep 17 00:00:00 2001 From: Wai-Hong Tam Date: Fri, 17 Jul 2020 15:26:55 -0700 Subject: ps8805: Follow the sequence to enable the DCI register access Follow the sequence in the programming guide to enable the DCI register access, even they are always enabled in the firmware. BRANCH=None BUG=b:161202452, b:147772854 TEST=Tested Trogdor negotiate >5V charging and source power to USB devices. Change-Id: Ia121855cf097fe4b517ceefa461568fbec67b63d Signed-off-by: Wai-Hong Tam Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2304264 Reviewed-by: Marco Chen Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2315967 Tested-by: Devin Lu Commit-Queue: Marco Chen --- driver/tcpm/ps8xxx.c | 27 +++++++++++++++++++++++---- 1 file changed, 23 insertions(+), 4 deletions(-) diff --git a/driver/tcpm/ps8xxx.c b/driver/tcpm/ps8xxx.c index 35f4870e51..ccf7a8517c 100644 --- a/driver/tcpm/ps8xxx.c +++ b/driver/tcpm/ps8xxx.c @@ -209,11 +209,30 @@ static int ps8xxx_dci_disable(int port) static int ps8xxx_dci_disable(int port) { int p1_addr; + int p3_addr; + int regval; + int rv; + + /* Enable access to debug pages. */ + p3_addr = tcpc_config[port].i2c_info.addr; + rv = tcpc_addr_read(port, p3_addr, PS8XXX_REG_I2C_DEBUGGING_ENABLE, + ®val); + if (rv) + return rv; - /* DCI registers are always accessible on PS8805 */ - p1_addr = PS8751_P3_TO_P1(tcpc_config[port].i2c_info.addr); - return ps8xxx_addr_dci_disable(port, p1_addr, - PS8805_P1_REG_MUX_USB_DCI_CFG); + rv = tcpc_addr_write(port, p3_addr, PS8XXX_REG_I2C_DEBUGGING_ENABLE, + PS8XXX_REG_I2C_DEBUGGING_ENABLE_ON); + + /* Disable Auto DCI */ + p1_addr = PS8751_P3_TO_P1(p3_addr); + rv = ps8xxx_addr_dci_disable(port, p1_addr, + PS8805_P1_REG_MUX_USB_DCI_CFG); + + /* + * PS8805 will automatically re-assert bit:0 on the + * PS8XXX_REG_I2C_DEBUGGING_ENABLE register. + */ + return rv; } #endif /* CONFIG_USB_PD_TCPM_PS8805 */ -- cgit v1.2.1