From f3c89e954d6170262f80ee68c0e8c3be3dd85140 Mon Sep 17 00:00:00 2001 From: Ting Shen Date: Wed, 3 Mar 2021 12:55:06 +0800 Subject: cherry: initial EC image Copied from Asurada, with minimal changes to copyright header and makefile to make it compilable and let linter happy. BUG=b:178158810 TEST=make BOARD=cherry -j32 BRANCH=main Signed-off-by: Ting Shen Change-Id: Ibf75df48336203fd84885856f971fea24f4ea288 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2730642 Commit-Queue: Ting Shen Tested-by: Ting Shen Reviewed-by: Eric Yilun Lin --- baseboard/cherry/baseboard.c | 635 +++++++++++++++++++++++++++++++++++++++ baseboard/cherry/baseboard.h | 229 ++++++++++++++ baseboard/cherry/board_id.c | 107 +++++++ baseboard/cherry/build.mk | 10 + baseboard/cherry/it5205_sbu.c | 68 +++++ baseboard/cherry/it5205_sbu.h | 13 + baseboard/cherry/usb_pd_policy.c | 221 ++++++++++++++ board/cherry/battery.c | 75 +++++ board/cherry/board.c | 288 ++++++++++++++++++ board/cherry/board.h | 109 +++++++ board/cherry/build.mk | 15 + board/cherry/ec.tasklist | 22 ++ board/cherry/gpio.inc | 170 +++++++++++ board/cherry/led.c | 205 +++++++++++++ 14 files changed, 2167 insertions(+) create mode 100644 baseboard/cherry/baseboard.c create mode 100644 baseboard/cherry/baseboard.h create mode 100644 baseboard/cherry/board_id.c create mode 100644 baseboard/cherry/build.mk create mode 100644 baseboard/cherry/it5205_sbu.c create mode 100644 baseboard/cherry/it5205_sbu.h create mode 100644 baseboard/cherry/usb_pd_policy.c create mode 100644 board/cherry/battery.c create mode 100644 board/cherry/board.c create mode 100644 board/cherry/board.h create mode 100644 board/cherry/build.mk create mode 100644 board/cherry/ec.tasklist create mode 100644 board/cherry/gpio.inc create mode 100644 board/cherry/led.c diff --git a/baseboard/cherry/baseboard.c b/baseboard/cherry/baseboard.c new file mode 100644 index 0000000000..04108bb485 --- /dev/null +++ b/baseboard/cherry/baseboard.c @@ -0,0 +1,635 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Asurada baseboard-specific configuration */ + +#include "adc.h" +#include "adc_chip.h" +#include "button.h" +#include "charge_manager.h" +#include "charger.h" +#include "charger.h" +#include "charge_state.h" +#include "charge_state_v2.h" +#include "chipset.h" +#include "common.h" +#include "console.h" +#include "driver/accelgyro_bmi_common.h" +#include "driver/accel_lis2dw12.h" +#include "driver/als_tcs3400.h" +#include "driver/bc12/mt6360.h" +#include "driver/bc12/pi3usb9201.h" +#include "driver/charger/isl923x.h" +#include "driver/charger/isl923x.h" +#include "driver/ppc/syv682x.h" +#include "driver/tcpm/it83xx_pd.h" +#include "driver/temp_sensor/thermistor.h" +#include "driver/usb_mux/it5205.h" +#include "driver/usb_mux/ps8743.h" +#include "extpower.h" +#include "gpio.h" +#include "hooks.h" +#include "i2c.h" +#include "i2c.h" +#include "it5205_sbu.h" +#include "keyboard_scan.h" +#include "lid_switch.h" +#include "motion_sense.h" +#include "power_button.h" +#include "power.h" +#include "power.h" +#include "pwm_chip.h" +#include "pwm.h" +#include "regulator.h" +#include "spi.h" +#include "switch.h" +#include "tablet_mode.h" +#include "task.h" +#include "temp_sensor.h" +#include "timer.h" +#include "uart.h" +#include "usb_charge.h" +#include "usbc_ppc.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usb_pd_tcpm.h" + +static void bc12_interrupt(enum gpio_signal signal); +static void ppc_interrupt(enum gpio_signal signal); +static void x_ec_interrupt(enum gpio_signal signal); + +#include "gpio_list.h" + +#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_SYSTEM, format, ## args) + +static enum board_sub_board board_get_sub_board(void); + +/* Wake-up pins for hibernate */ +enum gpio_signal hibernate_wake_pins[] = { + GPIO_AC_PRESENT, + GPIO_LID_OPEN, + GPIO_POWER_BUTTON_L, +}; +int hibernate_wake_pins_used = ARRAY_SIZE(hibernate_wake_pins); + +const struct charger_config_t chg_chips[] = { + { + .i2c_port = I2C_PORT_CHARGER, + .i2c_addr_flags = ISL923X_ADDR_FLAGS, + .drv = &isl923x_drv, + }, +}; + +__override void board_hibernate_late(void) +{ + /* + * Turn off PP5000_A. Required for devices without Z-state. + * Don't care for devices with Z-state. + */ + gpio_set_level(GPIO_EN_PP5000_A, 0); + + /* + * GPIO_EN_SLP_Z not implemented in rev0/1, + * fallback to usual hibernate process. + */ + if (board_get_version() <= 1) + return; + + isl9238c_hibernate(CHARGER_SOLO); + + gpio_set_level(GPIO_EN_SLP_Z, 1); + + /* should not reach here */ + __builtin_unreachable(); +} + +/* power signal list. Must match order of enum power_signal. */ +const struct power_signal_info power_signal_list[] = { + {GPIO_PMIC_EC_PWRGD, POWER_SIGNAL_ACTIVE_HIGH, "PMIC_PWR_GOOD"}, + {GPIO_AP_IN_SLEEP_L, POWER_SIGNAL_ACTIVE_LOW, "AP_IN_S3_L"}, + {GPIO_AP_EC_WATCHDOG_L, POWER_SIGNAL_ACTIVE_LOW, "AP_WDT_ASSERTED"}, +}; +BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); + +/* Detect subboard */ +static void board_tcpc_init(void) +{ + gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL); + /* C1: GPIO_USB_C1_PPC_INT_ODL & HDMI: GPIO_PS185_EC_DP_HPD */ + gpio_enable_interrupt(GPIO_X_EC_GPIO2); + + /* If this is not a Type-C subboard, disable the task. */ + if (board_get_sub_board() != SUB_BOARD_TYPEC) + task_disable_task(TASK_ID_PD_C1); +} +/* Must be done after I2C and subboard */ +DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C + 1); + +/* ADC channels. Must be in the exactly same order as in enum adc_channel. */ +const struct adc_t adc_channels[] = { + /* Convert to mV (3000mV/1024). */ + {"VBUS", ADC_MAX_MVOLT * 10, ADC_READ_MAX + 1, 0, CHIP_ADC_CH0}, + {"BOARD_ID_0", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH1}, + {"BOARD_ID_1", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH2}, + /* AMON/BMON gain = 17.97 */ + {"CHARGER_AMON_R", ADC_MAX_MVOLT * 1000 / 17.97, ADC_READ_MAX + 1, 0, + CHIP_ADC_CH3}, + {"CHARGER_PMON", ADC_MAX_MVOLT, ADC_READ_MAX + 1, 0, CHIP_ADC_CH6}, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); + +/* PPC */ +struct ppc_config_t ppc_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .i2c_port = I2C_PORT_PPC0, + .i2c_addr_flags = SYV682X_ADDR0_FLAGS, + .drv = &syv682x_drv, + .frs_en = GPIO_USB_C0_FRS_EN, + }, + { + .i2c_port = I2C_PORT_PPC1, + .i2c_addr_flags = SYV682X_ADDR0_FLAGS, + .drv = &syv682x_drv, + .frs_en = GPIO_USB_C1_FRS_EN, + }, +}; +unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); + +/* BC12 */ +const struct mt6360_config_t mt6360_config = { + .i2c_port = 0, + .i2c_addr_flags = MT6360_PMU_I2C_ADDR_FLAGS, +}; + +const struct pi3usb9201_config_t + pi3usb9201_bc12_chips[CONFIG_USB_PD_PORT_MAX_COUNT] = { + /* [0]: unused */ + [1] = { + .i2c_port = 4, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + } +}; + +struct bc12_config bc12_ports[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { .drv = &mt6360_drv }, + { .drv = &pi3usb9201_drv }, +}; + +static void bc12_interrupt(enum gpio_signal signal) +{ + if (signal == GPIO_USB_C0_BC12_INT_ODL) + task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); + else + task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); +} + +static void board_sub_bc12_init(void) +{ + if (board_get_sub_board() == SUB_BOARD_TYPEC) + gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L); + else + /* If this is not a Type-C subboard, disable the task. */ + task_disable_task(TASK_ID_USB_CHG_P1); +} +/* Must be done after I2C and subboard */ +DECLARE_HOOK(HOOK_INIT, board_sub_bc12_init, HOOK_PRIO_INIT_I2C + 1); + +static void ppc_interrupt(enum gpio_signal signal) +{ + if (signal == GPIO_USB_C0_PPC_INT_ODL) + /* C0: PPC interrupt */ + syv682x_interrupt(0); +} + +/* PWM */ + +/* + * PWM channels. Must be in the exactly same order as in enum pwm_channel. + * There total three 16 bits clock prescaler registers for all pwm channels, + * so use the same frequency and prescaler register setting is required if + * number of pwm channel greater than three. + */ +const struct pwm_t pwm_channels[] = { + [PWM_CH_LED1] = { + .channel = 0, + .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, + .freq_hz = 324, /* maximum supported frequency */ + .pcfsr_sel = PWM_PRESCALER_C4 + }, + [PWM_CH_LED2] = { + .channel = 1, + .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, + .freq_hz = 324, /* maximum supported frequency */ + .pcfsr_sel = PWM_PRESCALER_C4 + }, + [PWM_CH_LED3] = { + .channel = 2, + .flags = PWM_CONFIG_DSLEEP | PWM_CONFIG_ACTIVE_LOW, + .freq_hz = 324, /* maximum supported frequency */ + .pcfsr_sel = PWM_PRESCALER_C4 + }, +}; +BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); + + +/* Sub-board */ + +static enum board_sub_board board_get_sub_board(void) +{ + static enum board_sub_board sub = SUB_BOARD_NONE; + + if (sub != SUB_BOARD_NONE) + return sub; + + /* HDMI board has external pull high. */ + if (gpio_get_level(GPIO_EC_X_GPIO3)) { + sub = SUB_BOARD_HDMI; + /* Only has 1 PPC with HDMI subboard */ + ppc_cnt = 1; + /* EC_X_GPIO1 */ + gpio_set_flags(GPIO_EN_HDMI_PWR, GPIO_OUT_HIGH); + /* X_EC_GPIO2 */ + gpio_set_flags(GPIO_PS185_EC_DP_HPD, GPIO_INT_BOTH); + /* EC_X_GPIO3 */ + gpio_set_flags(GPIO_PS185_PWRDN_ODL, GPIO_ODR_HIGH); + } else { + sub = SUB_BOARD_TYPEC; + /* EC_X_GPIO1 */ + gpio_set_flags(GPIO_USB_C1_FRS_EN, GPIO_OUT_LOW); + /* X_EC_GPIO2 */ + gpio_set_flags(GPIO_USB_C1_PPC_INT_ODL, + GPIO_INT_BOTH | GPIO_PULL_UP); + /* EC_X_GPIO3 */ + gpio_set_flags(GPIO_USB_C1_DP_IN_HPD, GPIO_OUT_LOW); + } + + CPRINTS("Detect %s SUB", sub == SUB_BOARD_HDMI ? "HDMI" : "TYPEC"); + return sub; +} + +static void sub_board_init(void) +{ + board_get_sub_board(); +} +DECLARE_HOOK(HOOK_INIT, sub_board_init, HOOK_PRIO_INIT_I2C - 1); + +__override uint8_t board_get_usb_pd_port_count(void) +{ + if (board_get_sub_board() == SUB_BOARD_TYPEC) + return CONFIG_USB_PD_PORT_MAX_COUNT; + else + return CONFIG_USB_PD_PORT_MAX_COUNT - 1; +} + +/* Called on AP S3 -> S0 transition */ +static void board_chipset_resume(void) +{ + gpio_set_level(GPIO_EC_BL_EN_OD, 1); +} +DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); + +/* Called on AP S0 -> S3 transition */ +static void board_chipset_suspend(void) +{ + gpio_set_level(GPIO_EC_BL_EN_OD, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); + +/* USB-A */ +const int usb_port_enable[] = { + GPIO_EN_PP5000_USB_A0_VBUS, +}; +BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT); + +/* USB Mux */ + +void board_usb_mux_init(void) +{ + if (board_get_sub_board() == SUB_BOARD_TYPEC) + ps8743_tune_usb_eq(&usb_muxes[1], + PS8743_USB_EQ_TX_12_8_DB, + PS8743_USB_EQ_RX_12_8_DB); +} +DECLARE_HOOK(HOOK_INIT, board_usb_mux_init, HOOK_PRIO_INIT_I2C + 1); + +static int board_ps8743_mux_set(const struct usb_mux *me, + mux_state_t mux_state) +{ + int rv = EC_SUCCESS; + int reg = 0; + + rv = ps8743_read(me, PS8743_REG_MODE, ®); + if (rv) + return rv; + + /* Disable FLIP pin, enable I2C control. */ + reg |= PS8743_MODE_FLIP_REG_CONTROL; + /* Disable CE_USB pin, enable I2C control. */ + reg |= PS8743_MODE_USB_REG_CONTROL; + /* Disable CE_DP pin, enable I2C control. */ + reg |= PS8743_MODE_DP_REG_CONTROL; + + /* + * DP specific config + * + * Enable/Disable IN_HPD on the DB. + */ + gpio_set_level(GPIO_USB_C1_DP_IN_HPD, + mux_state & USB_PD_MUX_DP_ENABLED); + + return ps8743_write(me, PS8743_REG_MODE, reg); +} + +const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .usb_port = 0, + .i2c_port = I2C_PORT_USB_MUX0, + .i2c_addr_flags = IT5205_I2C_ADDR1_FLAGS, + .driver = &it5205_usb_mux_driver, + }, + { + .usb_port = 1, + .i2c_port = I2C_PORT_USB_MUX1, + .i2c_addr_flags = PS8743_I2C_ADDR0_FLAG, + .driver = &ps8743_usb_mux_driver, + .board_set = &board_ps8743_mux_set, + }, +}; + +/* + * I2C channels (A, B, and C) are using the same timing registers (00h~07h) + * at default. + * In order to set frequency independently for each channels, + * We use timing registers 09h~0Bh, and the supported frequency will be: + * 50KHz, 100KHz, 400KHz, or 1MHz. + * I2C channels (D, E and F) can be set different frequency on different ports. + * The I2C(D/E/F) frequency depend on the frequency of SMBus Module and + * the individual prescale register. + * The frequency of SMBus module is 24MHz on default. + * The allowed range of I2C(D/E/F) frequency is as following setting. + * SMBus Module Freq = PLL_CLOCK / ((IT83XX_ECPM_SCDCR2 & 0x0F) + 1) + * (SMBus Module Freq / 510) <= I2C Freq <= (SMBus Module Freq / 8) + * Channel D has multi-function and can be used as UART interface. + * Channel F is reserved for EC debug. + */ + +/* I2C ports */ +const struct i2c_port_t i2c_ports[] = { + {"bat_chg", IT83XX_I2C_CH_A, 100, GPIO_I2C_A_SCL, GPIO_I2C_A_SDA}, + {"sensor", IT83XX_I2C_CH_B, 400, GPIO_I2C_B_SCL, GPIO_I2C_B_SDA}, + {"usb0", IT83XX_I2C_CH_C, 400, GPIO_I2C_C_SCL, GPIO_I2C_C_SDA}, + {"usb1", IT83XX_I2C_CH_E, 400, GPIO_I2C_E_SCL, GPIO_I2C_E_SDA}, +}; +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); + +int board_allow_i2c_passthru(int port) +{ + return (port == I2C_PORT_VIRTUAL_BATTERY); +} + + +void board_overcurrent_event(int port, int is_overcurrented) +{ + /* TODO: check correct operation for Asurada */ +} + +/* TCPC */ +const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .bus_type = EC_BUS_TYPE_EMBEDDED, + /* TCPC is embedded within EC so no i2c config needed */ + .drv = &it8xxx2_tcpm_drv, + /* Alert is active-low, push-pull */ + .flags = 0, + }, + { + .bus_type = EC_BUS_TYPE_EMBEDDED, + /* TCPC is embedded within EC so no i2c config needed */ + .drv = &it8xxx2_tcpm_drv, + /* Alert is active-low, push-pull */ + .flags = 0, + }, +}; + +const struct cc_para_t *board_get_cc_tuning_parameter(enum usbpd_port port) +{ + const static struct cc_para_t + cc_parameter[CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT] = { + { + .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, + .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, + }, + { + .rising_time = IT83XX_TX_PRE_DRIVING_TIME_1_UNIT, + .falling_time = IT83XX_TX_PRE_DRIVING_TIME_2_UNIT, + }, + }; + + return &cc_parameter[port]; +} + +uint16_t tcpc_get_alert_status(void) +{ + /* + * C0 & C1: TCPC is embedded in the EC and processes interrupts in the + * chip code (it83xx/intc.c) + */ + return 0; +} + +void board_reset_pd_mcu(void) +{ + /* + * C0 & C1: TCPC is embedded in the EC and processes interrupts in the + * chip code (it83xx/intc.c) + */ +} + +void board_set_charge_limit(int port, int supplier, int charge_ma, + int max_ma, int charge_mv) +{ + charge_set_input_current_limit( + MAX(charge_ma, CONFIG_CHARGER_INPUT_CURRENT), charge_mv); +} + +void board_pd_vconn_ctrl(int port, enum usbpd_cc_pin cc_pin, int enabled) +{ + /* + * We ignore the cc_pin and PPC vconn because polarity and PPC vconn + * should already be set correctly in the PPC driver via the pd + * state machine. + */ +} + +int board_set_active_charge_port(int port) +{ + int i; + int is_valid_port = port == 0 || (port == 1 && board_get_sub_board() == + SUB_BOARD_TYPEC); + + if (!is_valid_port && port != CHARGE_PORT_NONE) + return EC_ERROR_INVAL; + + if (port == CHARGE_PORT_NONE) { + CPRINTS("Disabling all charger ports"); + + /* Disable all ports. */ + for (i = 0; i < ppc_cnt; i++) { + /* + * Do not return early if one fails otherwise we can + * get into a boot loop assertion failure. + */ + if (ppc_vbus_sink_enable(i, 0)) + CPRINTS("Disabling C%d as sink failed.", i); + } + + return EC_SUCCESS; + } + + /* Check if the port is sourcing VBUS. */ + if (ppc_is_sourcing_vbus(port)) { + CPRINTF("Skip enable C%d", port); + return EC_ERROR_INVAL; + } + + CPRINTS("New charge port: C%d", port); + + /* + * Turn off the other ports' sink path FETs, before enabling the + * requested charge port. + */ + for (i = 0; i < ppc_cnt; i++) { + if (i == port) + continue; + + if (ppc_vbus_sink_enable(i, 0)) + CPRINTS("C%d: sink path disable failed.", i); + } + + /* Enable requested charge port. */ + if (ppc_vbus_sink_enable(port, 1)) { + CPRINTS("C%d: sink path enable failed.", port); + return EC_ERROR_UNKNOWN; + } + + return EC_SUCCESS; +} + +/** + * Handle PS185 HPD changing state. + */ +int debounced_hpd; + +static void ps185_hdmi_hpd_deferred(void) +{ + const int new_hpd = gpio_get_level(GPIO_PS185_EC_DP_HPD); + + /* HPD status not changed, probably a glitch, just return. */ + if (debounced_hpd == new_hpd) + return; + + debounced_hpd = new_hpd; + + gpio_set_level(GPIO_EC_DPBRDG_HPD_ODL, !debounced_hpd); + CPRINTS(debounced_hpd ? "HDMI plug" : "HDMI unplug"); +} +DECLARE_DEFERRED(ps185_hdmi_hpd_deferred); + +#define PS185_HPD_DEBOUCE 250 + +static void hdmi_hpd_interrupt(enum gpio_signal signal) +{ + hook_call_deferred(&ps185_hdmi_hpd_deferred_data, PS185_HPD_DEBOUCE); +} + +/* HDMI/TYPE-C function shared subboard interrupt */ +static void x_ec_interrupt(enum gpio_signal signal) +{ + int sub = board_get_sub_board(); + + if (sub == SUB_BOARD_TYPEC) + /* C1: PPC interrupt */ + syv682x_interrupt(1); + else if (sub == SUB_BOARD_HDMI) + hdmi_hpd_interrupt(signal); + else + CPRINTS("Undetected subboard interrupt."); +} + +int ppc_get_alert_status(int port) +{ + if (port == 0) + return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0; + if (port == 1 && board_get_sub_board() == SUB_BOARD_TYPEC) + return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0; + + return 0; +} +/* SD Card */ +int board_regulator_get_info(uint32_t index, char *name, + uint16_t *num_voltages, uint16_t *voltages_mv) +{ + enum mt6360_regulator_id id = index; + + return mt6360_regulator_get_info(id, name, num_voltages, + voltages_mv); +} + +int board_regulator_enable(uint32_t index, uint8_t enable) +{ + enum mt6360_regulator_id id = index; + + return mt6360_regulator_enable(id, enable); +} + +int board_regulator_is_enabled(uint32_t index, uint8_t *enabled) +{ + enum mt6360_regulator_id id = index; + + return mt6360_regulator_is_enabled(id, enabled); +} + +int board_regulator_set_voltage(uint32_t index, uint32_t min_mv, + uint32_t max_mv) +{ + enum mt6360_regulator_id id = index; + + return mt6360_regulator_set_voltage(id, min_mv, max_mv); +} + +int board_regulator_get_voltage(uint32_t index, uint32_t *voltage_mv) +{ + enum mt6360_regulator_id id = index; + + return mt6360_regulator_get_voltage(id, voltage_mv); +} + +/* Lid */ +#ifndef TEST_BUILD +/* This callback disables keyboard when convertibles are fully open */ +void lid_angle_peripheral_enable(int enable) +{ + int chipset_in_s0 = chipset_in_state(CHIPSET_STATE_ON); + + if (enable) { + keyboard_scan_enable(1, KB_SCAN_DISABLE_LID_ANGLE); + } else { + /* + * Ensure that the chipset is off before disabling the keyboard. + * When the chipset is on, the EC keeps the keyboard enabled and + * the AP decides whether to ignore input devices or not. + */ + if (!chipset_in_s0) + keyboard_scan_enable(0, KB_SCAN_DISABLE_LID_ANGLE); + } +} +#endif + +static void baseboard_init(void) +{ + gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_ODL); +} +DECLARE_HOOK(HOOK_INIT, baseboard_init, HOOK_PRIO_DEFAULT-1); diff --git a/baseboard/cherry/baseboard.h b/baseboard/cherry/baseboard.h new file mode 100644 index 0000000000..d16e9d97e4 --- /dev/null +++ b/baseboard/cherry/baseboard.h @@ -0,0 +1,229 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Asurada board configuration */ + +#ifndef __CROS_EC_BASEBOARD_H +#define __CROS_EC_BASEBOARD_H + +/* IT81202-bx config */ +/* + * NOTE: we need to make correct VCC voltage selection here if EC's VCC isn't + * connect to 1.8v on other versions. + */ +#define CONFIG_IT83XX_VCC_1P8V + +/* + * On power-on, H1 releases the EC from reset but then quickly asserts and + * releases the reset a second time. This means the EC sees 2 resets: + * (1) power-on reset, (2) reset-pin reset. This config will + * allow the second reset to be treated as a power-on. + */ +#define CONFIG_BOARD_RESET_AFTER_POWER_ON +#define CONFIG_BOARD_VERSION_CUSTOM +#define CONFIG_CHIPSET_MT8192 +#define CONFIG_EXTPOWER_GPIO +#define CONFIG_HIBERNATE_WAKE_PINS_DYNAMIC + +/* Chipset */ +#define CONFIG_CMD_AP_RESET_LOG +#define CONFIG_CMD_POWERINDEBUG +#define CONFIG_HOST_COMMAND_STATUS +#define CONFIG_LOW_POWER_IDLE +#define CONFIG_LOW_POWER_S0 +#define CONFIG_POWER_BUTTON +#define CONFIG_POWER_COMMON +#define CONFIG_PWM +#define CONFIG_VBOOT_HASH +#define CONFIG_VOLUME_BUTTONS +#define CONFIG_WP_ACTIVE_HIGH + +/* Battery */ +#define CONFIG_BATTERY_CUT_OFF +#define CONFIG_BATTERY_FUEL_GAUGE +#define CONFIG_BATTERY_PRESENT_GPIO GPIO_EC_BATT_PRES_ODL +#define CONFIG_BATTERY_SMART + +/* BC12 */ +#define CONFIG_BC12_DETECT_MT6360 +#define CONFIG_BC12_DETECT_PI3USB9201 +#undef CONFIG_BC12_SINGLE_DRIVER +#define CONFIG_USB_CHARGER + +/* Charger */ +#define ADC_AMON_BMON ADC_CHARGER_AMON_R /* ADC name remap */ +#define ADC_PSYS ADC_CHARGER_PMON /* ADC name remap */ +#define CONFIG_CHARGE_MANAGER +#define CONFIG_CHARGER +#define CONFIG_CHARGE_RAMP_HW +#define CONFIG_CHARGER_DISCHARGE_ON_AC +#define CONFIG_CHARGER_INPUT_CURRENT 512 +#define CONFIG_CHARGER_ISL9238C +#define CONFIG_CHARGER_MAINTAIN_VBAT +#define CONFIG_CHARGER_OTG +#define CONFIG_CHARGER_PSYS +#define CONFIG_CHARGER_PSYS_READ +#define CONFIG_CHARGER_SENSE_RESISTOR 10 /* BOARD_RS2 */ +#define CONFIG_CHARGER_SENSE_RESISTOR_AC 20 /* BOARD_RS1 */ +#define CONFIG_CMD_CHARGER_ADC_AMON_BMON + +/* Keyboard */ +#define CONFIG_CMD_KEYBOARD +#define CONFIG_KEYBOARD_COL2_INVERTED +#define CONFIG_KEYBOARD_PROTOCOL_MKBP +#define CONFIG_MKBP_USE_GPIO + +/* I2C */ +#define CONFIG_I2C +#define CONFIG_I2C_CONTROLLER +#define CONFIG_I2C_PASSTHRU_RESTRICTED +#define CONFIG_I2C_VIRTUAL_BATTERY +#define I2C_PORT_CHARGER IT83XX_I2C_CH_A +#define I2C_PORT_BATTERY IT83XX_I2C_CH_A +#define I2C_PORT_ACCEL IT83XX_I2C_CH_B +#define I2C_PORT_PPC0 IT83XX_I2C_CH_C +#define I2C_PORT_PPC1 IT83XX_I2C_CH_E +#define I2C_PORT_USB_MUX0 IT83XX_I2C_CH_C +#define I2C_PORT_USB_MUX1 IT83XX_I2C_CH_E +#define I2C_PORT_VIRTUAL_BATTERY I2C_PORT_BATTERY +#define CONFIG_SMBUS_PEC + +/* LED */ +#define CONFIG_LED_COMMON + +/* PD / USB-C / PPC */ +#define CONFIG_CMD_PPC_DUMP +#define CONFIG_HOSTCMD_PD_CONTROL +#define CONFIG_IT83XX_TUNE_CC_PHY +#define CONFIG_USBC_PPC +#define CONFIG_USBC_PPC_DEDICATED_INT +#define CONFIG_USBC_PPC_POLARITY +#define CONFIG_USBC_PPC_SYV682X +#define CONFIG_USBC_PPC_VCONN +#define CONFIG_USBC_SS_MUX +#define CONFIG_USBC_VCONN +#define CONFIG_USBC_VCONN_SWAP +#define CONFIG_USB_DRP_ACC_TRYSRC +#define CONFIG_USB_MUX_IT5205 /* C0 */ +#define CONFIG_USB_MUX_PS8743 /* C1 */ +#define CONFIG_USB_PD_ALT_MODE +#define CONFIG_USB_PD_ALT_MODE_DFP +#define CONFIG_USB_PD_DECODE_SOP +#define CONFIG_USB_PD_DISCHARGE +#define CONFIG_USB_PD_DISCHARGE_PPC +#define CONFIG_USB_PD_DP_HPD_GPIO +#define CONFIG_USB_PD_DP_HPD_GPIO_CUSTOM +#define CONFIG_USB_PD_DUAL_ROLE +#define CONFIG_USB_PD_ITE_ACTIVE_PORT_COUNT 2 +#define CONFIG_USB_PD_LOGGING +#define CONFIG_USB_PD_PORT_MAX_COUNT 2 +#define CONFIG_USB_PD_REV30 +#define CONFIG_USB_PD_TCPC_LOW_POWER +#define CONFIG_USB_PD_TCPM_ITE_ON_CHIP +#define CONFIG_USB_PD_TCPM_TCPCI +#define CONFIG_USB_PD_TCPMV2 +#define CONFIG_USB_PD_TRY_SRC +#define CONFIG_USB_PD_VBUS_DETECT_PPC +#define CONFIG_USB_PID 0x5566 /* TODO: update PID */ +#define CONFIG_USB_POWER_DELIVERY + +#define PD_MAX_CURRENT_MA 3000 +#define PD_MAX_VOLTAGE_MV 20000 +#define PD_OPERATING_POWER_MW 15000 +#define PD_MAX_POWER_MW 60000 +#define PD_POWER_SUPPLY_TURN_ON_DELAY 30000 /* us */ +#define PD_POWER_SUPPLY_TURN_OFF_DELAY 250000 /* us */ + +/* USB-A */ +#define CONFIG_USB_PORT_POWER_DUMB +#define USB_PORT_COUNT USBA_PORT_COUNT + +/* UART */ +#undef CONFIG_UART_TX_BUF_SIZE +#define CONFIG_UART_TX_BUF_SIZE 4096 + +/* Sensor */ +#define CONFIG_CMD_ACCEL_INFO +#define CONFIG_CMD_ACCELS + +#define CONFIG_ACCEL_FIFO +#define CONFIG_ACCEL_FIFO_SIZE 256 +#define CONFIG_ACCEL_FIFO_THRES (CONFIG_ACCEL_FIFO_SIZE / 3) +#define CONFIG_ACCEL_INTERRUPTS + +/* SPI / Host Command */ +#define CONFIG_SPI +#define CONFIG_SUPPRESSED_HOST_COMMANDS \ + EC_CMD_CONSOLE_SNAPSHOT, EC_CMD_CONSOLE_READ, EC_CMD_MOTION_SENSE_CMD, \ + EC_CMD_PD_GET_LOG_ENTRY + +/* MKBP */ +#define CONFIG_MKBP_EVENT + +#define CONFIG_KEYBOARD_PROTOCOL_MKBP +#define CONFIG_MKBP_USE_GPIO + +/* Voltage regulator control */ +#define CONFIG_HOSTCMD_REGULATOR + +/* Define the host events which are allowed to wakeup AP in S3. */ +#define CONFIG_MKBP_HOST_EVENT_WAKEUP_MASK \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) | \ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) | \ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) | \ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) | /* for DP */ \ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) + +/* GPIO name remapping */ +#define GPIO_EN_HDMI_PWR GPIO_EC_X_GPIO1 +#define GPIO_USB_C1_FRS_EN GPIO_EC_X_GPIO1 +#define GPIO_USB_C1_PPC_INT_ODL GPIO_X_EC_GPIO2 +#define GPIO_PS185_EC_DP_HPD GPIO_X_EC_GPIO2 +#define GPIO_USB_C1_DP_IN_HPD GPIO_EC_X_GPIO3 +#define GPIO_PS185_PWRDN_ODL GPIO_EC_X_GPIO3 + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" +#include "registers.h" + +enum adc_channel { + ADC_VBUS, /* ADC 0 */ + ADC_BOARD_ID_0, /* ADC 1 */ + ADC_BOARD_ID_1, /* ADC 2 */ + ADC_CHARGER_AMON_R, /* ADC 3 */ + ADC_CHARGER_PMON, /* ADC 6 */ + + /* Number of ADC channels */ + ADC_CH_COUNT, +}; + +enum pwm_channel { + PWM_CH_LED1, + PWM_CH_LED2, + PWM_CH_LED3, + PWM_CH_COUNT, +}; + +enum power_signal { + PMIC_PWR_GOOD, + AP_IN_S3_L, + AP_WDT_ASSERTED, + POWER_SIGNAL_COUNT, +}; + +enum board_sub_board { + SUB_BOARD_NONE = -1, + SUB_BOARD_TYPEC, + SUB_BOARD_HDMI, + + SUB_BOARD_COUNT, +}; + +int board_get_version(void); +void board_reset_pd_mcu(void); + +#endif /* !__ASSEMBLER__ */ +#endif /* __CROS_EC_BASEBOARD_H */ diff --git a/baseboard/cherry/board_id.c b/baseboard/cherry/board_id.c new file mode 100644 index 0000000000..a8bee6d412 --- /dev/null +++ b/baseboard/cherry/board_id.c @@ -0,0 +1,107 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "adc.h" +#include "common.h" +#include "console.h" +#include "gpio.h" +#include "hooks.h" +#include "timer.h" +#include "util.h" + +/** + * Conversion based on following table: + * + * ID | Rp | Rd | Voltage + * | kOhm | kOhm | mV + * ---+------+------+-------- + * 0 | 51.1 | 2.2 | 136.2 + * 1 | 51.1 | 6.81 | 388.1 + * 2 | 51.1 | 11 | 584.5 + * 3 | 57.6 | 18 | 785.7 + * 4 | 51.1 | 22 | 993.2 + * 5 | 51.1 | 30 | 1220.7 + * 6 | 51.1 | 39.2 | 1432.6 + * 7 | 56 | 56 | 1650.0 + * 8 | 47 | 61.9 | 1875.8 + * 9 | 47 | 80.6 | 2084.5 + * 10 | 56 | 124 | 2273.3 + * 11 | 51.1 | 150 | 2461.5 + * 12 | 47 | 200 | 2672.1 + * 13 | 47 | 330 | 2888.6 + * 14 | 47 | 680 | 3086.7 + */ +const static int voltage_map[] = { + 136, + 388, + 584, + 785, + 993, + 1220, + 1432, + 1650, + 1875, + 2084, + 2273, + 2461, + 2672, + 2888, + 3086, +}; + +const int threshold_mv = 100; + +/** + * Convert ADC value to board id using the voltage table above. + * + * @param ch ADC channel to read, usually ADC_BOARD_ID_0 or ADC_BOARD_ID_1. + * + * @return a non-negative board id, or negative value if error. + */ +static int adc_value_to_numeric_id(enum adc_channel ch) +{ + int mv; + + gpio_set_level(GPIO_EN_EC_ID_ODL, 0); + /* Wait to allow cap charge */ + msleep(10); + + mv = adc_read_channel(ch); + if (mv == ADC_READ_ERROR) + mv = adc_read_channel(ch); + + gpio_set_level(GPIO_EN_EC_ID_ODL, 1); + + if (mv == ADC_READ_ERROR) + return -EC_ERROR_UNKNOWN; + + for (int i = 0; i < ARRAY_SIZE(voltage_map); i++) { + if (IN_RANGE(mv, voltage_map[i] - threshold_mv, + voltage_map[i] + threshold_mv)) + return i; + } + + return -EC_ERROR_UNKNOWN; +} + +static int version = -1; + +/* b/163963220: Cache ADC value before board_hibernate_late() reads it */ +static void board_version_init(void) +{ + version = adc_value_to_numeric_id(ADC_BOARD_ID_0); + if (version < 0) { + ccprints("WARN:BOARD_ID_0"); + ccprints("Assuming board id = 0"); + + version = 0; + } +} +DECLARE_HOOK(HOOK_INIT, board_version_init, HOOK_PRIO_INIT_ADC + 1); + +int board_get_version(void) +{ + return version; +} diff --git a/baseboard/cherry/build.mk b/baseboard/cherry/build.mk new file mode 100644 index 0000000000..58e9934bc0 --- /dev/null +++ b/baseboard/cherry/build.mk @@ -0,0 +1,10 @@ +# -*- makefile -*- +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Baseboard specific files build +# + +baseboard-y=baseboard.o board_id.o +baseboard-$(CONFIG_USB_POWER_DELIVERY)+=usb_pd_policy.o diff --git a/baseboard/cherry/it5205_sbu.c b/baseboard/cherry/it5205_sbu.c new file mode 100644 index 0000000000..61a996fcbe --- /dev/null +++ b/baseboard/cherry/it5205_sbu.c @@ -0,0 +1,68 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * IT5205 Type-C SBU OVP handler + */ + +#include "console.h" +#include "hooks.h" +#include "it5205.h" +#include "stdbool.h" +#include "timer.h" +#include "usb_mux.h" + +#define CPRINTS(format, args...) cprints(CC_USB, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USB, format, ## args) + +#define OVP_RETRY_DELAY_US_MIN (100 * MSEC) + +static unsigned int ovp_retry_delay_us = OVP_RETRY_DELAY_US_MIN; + +static void reset_retry_delay(void) +{ + CPRINTS("IT5205 SBU OVP cleared"); + ovp_retry_delay_us = OVP_RETRY_DELAY_US_MIN; +} +DECLARE_DEFERRED(reset_retry_delay); + +static void reset_csbu(void) +{ + /* double the retry time up to 1 minute */ + ovp_retry_delay_us = MIN(ovp_retry_delay_us * 2, MINUTE); + /* and reset it if interrupt not triggered in a short period */ + hook_call_deferred(&reset_retry_delay_data, 500 * MSEC); + + /* re-enable sbu interrupt */ + it5205h_enable_csbu_switch(&usb_muxes[0], false); + it5205h_enable_csbu_switch(&usb_muxes[0], true); +} +DECLARE_DEFERRED(reset_csbu); + +static void it5205h_hook_ac_change(void) +{ + int reg; + + /* Check if the board has IT5205H, and read its ovp status */ + if (i2c_read8(I2C_PORT_USB_MUX0, IT5205H_SBU_I2C_ADDR_FLAGS, + IT5205H_REG_ISR, ®)) + return; + + /* + * Re-poll ovp status immediately if AC detached, because ovp will + * likely be recovered. + * + * Always perform the re-poll even when this hook is triggered by + * unrelated events. + */ + if (reg & IT5205H_ISR_CSBU_OVP) + hook_call_deferred(&reset_csbu_data, 0); +} +DECLARE_HOOK(HOOK_AC_CHANGE, it5205h_hook_ac_change, HOOK_PRIO_DEFAULT); + +void it5205h_sbu_interrupt(enum gpio_signal signal) +{ + CPRINTS("IT5205 SBU OVP triggered"); + hook_call_deferred(&reset_csbu_data, ovp_retry_delay_us); + hook_call_deferred(&reset_retry_delay_data, -1); +} diff --git a/baseboard/cherry/it5205_sbu.h b/baseboard/cherry/it5205_sbu.h new file mode 100644 index 0000000000..43f226da3b --- /dev/null +++ b/baseboard/cherry/it5205_sbu.h @@ -0,0 +1,13 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * IT5205 Type-C SBU OVP handler + */ + +#ifndef __CROS_EC_ASURADA_IT5205_SBU_H +#define __CROS_EC_ASURADA_IT5205_SBU_H + +void it5205h_sbu_interrupt(enum gpio_signal signal); + +#endif /* __CROS_EC_ASURADA_IT5205_SBU_H */ diff --git a/baseboard/cherry/usb_pd_policy.c b/baseboard/cherry/usb_pd_policy.c new file mode 100644 index 0000000000..7d56e95d6c --- /dev/null +++ b/baseboard/cherry/usb_pd_policy.c @@ -0,0 +1,221 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +#include "charge_manager.h" +#include "chipset.h" +#include "timer.h" +#include "usb_dp_alt_mode.h" +#include "usb_mux.h" +#include "usb_pd.h" +#include "usbc_ppc.h" + +#if CONFIG_USB_PD_3A_PORTS != 1 +#error Asurada reference must have at least one 3.0 A port +#endif + +#define CPRINTS(format, args...) cprints(CC_USBPD, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ## args) + +/* The port that the aux channel is on. */ +static enum { + AUX_PORT_NONE = -1, + AUX_PORT_C0 = 0, + AUX_PORT_C1HDMI = 1, +} aux_port = AUX_PORT_NONE; + +int svdm_get_hpd_gpio(int port) +{ + /* HPD is low active, inverse the result */ + return !gpio_get_level(GPIO_EC_DPBRDG_HPD_ODL); +} + +void svdm_set_hpd_gpio(int port, int en) +{ + /* + * HPD is low active, inverse the en + * TODO: C0&C1 shares the same HPD, implement FCFS policy. + */ + gpio_set_level(GPIO_EC_DPBRDG_HPD_ODL, !en); +} + +static void aux_switch_port(int port) +{ + if (port != AUX_PORT_NONE) + gpio_set_level_verbose(CC_USBPD, GPIO_DP_AUX_PATH_SEL, port); + aux_port = port; +} + +static void aux_display_disconnected(int port) +{ + /* Gets the other port. C0 -> C1, C1 -> C0. */ + int other_port = !port; + + /* If the current port is not the aux port, nothing needs to be done. */ + if (aux_port != port) + return; + + /* If the other port is connected to a external display, switch aux. */ + if (dp_status[other_port] & DP_FLAGS_DP_ON) + aux_switch_port(other_port); + else + aux_switch_port(AUX_PORT_NONE); +} + +__override int svdm_dp_attention(int port, uint32_t *payload) +{ + int lvl = PD_VDO_DPSTS_HPD_LVL(payload[1]); + int irq = PD_VDO_DPSTS_HPD_IRQ(payload[1]); +#ifdef CONFIG_USB_PD_DP_HPD_GPIO + int cur_lvl = svdm_get_hpd_gpio(port); +#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ + + dp_status[port] = payload[1]; + + if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND) && + (irq || lvl)) + /* + * Wake up the AP. IRQ or level high indicates a DP sink is now + * present. + */ + if (IS_ENABLED(CONFIG_MKBP_EVENT)) + pd_notify_dp_alt_mode_entry(port); + + /* Its initial DP status message prior to config */ + if (!(dp_flags[port] & DP_FLAGS_DP_ON)) { + if (lvl) + dp_flags[port] |= DP_FLAGS_HPD_HI_PENDING; + return 1; + } + +#ifdef CONFIG_USB_PD_DP_HPD_GPIO + if (irq && !lvl) { + /* + * IRQ can only be generated when the level is high, because + * the IRQ is signaled by a short low pulse from the high level. + */ + CPRINTF("ERR:HPD:IRQ&LOW\n"); + return 0; /* nak */ + } + + if (irq && cur_lvl) { + uint64_t now = get_time().val; + /* wait for the minimum spacing between IRQ_HPD if needed */ + if (now < svdm_hpd_deadline[port]) + usleep(svdm_hpd_deadline[port] - now); + + /* generate IRQ_HPD pulse */ + svdm_set_hpd_gpio(port, 0); + /* + * b/171172053#comment14: since the HPD_DSTREAM_DEBOUNCE_IRQ is + * very short (500us), we can use udelay instead of usleep for + * more stable pulse period. + */ + udelay(HPD_DSTREAM_DEBOUNCE_IRQ); + svdm_set_hpd_gpio(port, 1); + } else { + svdm_set_hpd_gpio(port, lvl); + } + + /* + * Asurada can only output to 1 display port at a time. + * This implements FCFS policy by changing the aux channel. If a + * display is connected to the either port (says A), and the port A + * will be served until the display is disconnected from port A. + * It won't output to the other display which connects to port B. + */ + if (lvl && aux_port == AUX_PORT_NONE) + /* + * A display is connected, and no display was plugged on either + * port. + */ + aux_switch_port(port); + else if (!lvl) + aux_display_disconnected(port); + + + /* set the minimum time delay (2ms) for the next HPD IRQ */ + svdm_hpd_deadline[port] = get_time().val + HPD_USTREAM_DEBOUNCE_LVL; +#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ + + usb_mux_hpd_update(port, lvl, irq); + +#ifdef USB_PD_PORT_TCPC_MST + if (port == USB_PD_PORT_TCPC_MST) + baseboard_mst_enable_control(port, lvl); +#endif + + /* ack */ + return 1; +} + +__override void svdm_exit_dp_mode(int port) +{ +#ifdef CONFIG_USB_PD_DP_HPD_GPIO + svdm_set_hpd_gpio(port, 0); +#endif /* CONFIG_USB_PD_DP_HPD_GPIO */ + usb_mux_hpd_update(port, 0, 0); + + aux_display_disconnected(port); + +#ifdef USB_PD_PORT_TCPC_MST + if (port == USB_PD_PORT_TCPC_MST) + baseboard_mst_enable_control(port, 0); +#endif +} + +int pd_snk_is_vbus_provided(int port) +{ + return ppc_is_vbus_present(port); +} + +void pd_power_supply_reset(int port) +{ + int prev_en; + + prev_en = ppc_is_sourcing_vbus(port); + + /* Disable VBUS. */ + ppc_vbus_source_enable(port, 0); + + /* Enable discharge if we were previously sourcing 5V */ + if (prev_en) + pd_set_vbus_discharge(port, 1); + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); +} + +int pd_check_vconn_swap(int port) +{ + /* Allow Vconn swap if AP is on. */ + return chipset_in_state(CHIPSET_STATE_SUSPEND | CHIPSET_STATE_ON); +} + +int pd_set_power_supply_ready(int port) +{ + int rv; + + /* Disable charging. */ + rv = ppc_vbus_sink_enable(port, 0); + if (rv) + return rv; + + pd_set_vbus_discharge(port, 0); + + /* Provide Vbus. */ + rv = ppc_vbus_source_enable(port, 1); + if (rv) + return rv; + + /* Notify host of power info change. */ + pd_send_host_event(PD_EVENT_POWER_CHANGE); + + return EC_SUCCESS; +} + +int board_vbus_source_enabled(int port) +{ + return ppc_is_sourcing_vbus(port); +} + diff --git a/board/cherry/battery.c b/board/cherry/battery.c new file mode 100644 index 0000000000..f681008b98 --- /dev/null +++ b/board/cherry/battery.c @@ -0,0 +1,75 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +#include "battery.h" +#include "battery_fuel_gauge.h" +#include "battery_smart.h" +#include "charge_manager.h" +#include "chipset.h" +#include "gpio.h" +#include "hooks.h" +#include "system.h" +#include "usb_pd.h" + +const struct board_batt_params board_battery_info[] = { + [BATTERY_C235] = { + .fuel_gauge = { + .manuf_name = "AS3GWRc3KA", + .device_name = "C235-41", + .ship_mode = { + .reg_addr = 0x0, + .reg_data = { 0x10, 0x10 }, + }, + .fet = { + .reg_addr = 0x99, + .reg_mask = 0x0c, + .disconnect_val = 0x0c, + } + }, + .batt_info = { + .voltage_max = 8800, + .voltage_normal = 7700, + .voltage_min = 6000, + .precharge_current = 256, + .start_charging_min_c = 0, + .start_charging_max_c = 45, + .charging_min_c = 0, + .charging_max_c = 60, + .discharging_min_c = 0, + .discharging_max_c = 60, + }, + }, +}; +BUILD_ASSERT(ARRAY_SIZE(board_battery_info) == BATTERY_TYPE_COUNT); + +const enum battery_type DEFAULT_BATTERY_TYPE = BATTERY_C235; + +static void reduce_input_voltage_when_full(void) +{ + struct batt_params batt; + int max_pd_voltage_mv; + int active_chg_port; + + if (!system_is_locked()) + return; + + active_chg_port = charge_manager_get_active_charge_port(); + if (active_chg_port == CHARGE_PORT_NONE) + return; + + battery_get_params(&batt); + /* Lower our input voltage to 9V when battery is full. */ + if (!(batt.flags & BATT_FLAG_BAD_STATUS) && + (batt.status & STATUS_FULLY_CHARGED) && + chipset_in_state(CHIPSET_STATE_ANY_OFF)) + max_pd_voltage_mv = 9000; + else + max_pd_voltage_mv = PD_MAX_VOLTAGE_MV; + + if (pd_get_max_voltage() != max_pd_voltage_mv) + pd_set_external_voltage_limit(active_chg_port, + max_pd_voltage_mv); +} +DECLARE_HOOK(HOOK_SECOND, reduce_input_voltage_when_full, HOOK_PRIO_DEFAULT); diff --git a/board/cherry/board.c b/board/cherry/board.c new file mode 100644 index 0000000000..92820df369 --- /dev/null +++ b/board/cherry/board.c @@ -0,0 +1,288 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +/* Asurada board configuration */ + +#include "adc.h" +#include "adc_chip.h" +#include "button.h" +#include "charge_manager.h" +#include "charge_state_v2.h" +#include "charger.h" +#include "chipset.h" +#include "common.h" +#include "console.h" +#include "driver/accel_lis2dw12.h" +#include "driver/accelgyro_bmi_common.h" +#include "driver/als_tcs3400.h" +#include "driver/bc12/mt6360.h" +#include "driver/bc12/pi3usb9201.h" +#include "driver/charger/isl923x.h" +#include "driver/ppc/syv682x.h" +#include "driver/tcpm/it83xx_pd.h" +#include "driver/temp_sensor/thermistor.h" +#include "driver/usb_mux/it5205.h" +#include "driver/usb_mux/ps8743.h" +#include "extpower.h" +#include "gpio.h" +#include "hooks.h" +#include "i2c.h" +#include "keyboard_scan.h" +#include "lid_switch.h" +#include "motion_sense.h" +#include "power.h" +#include "power_button.h" +#include "pwm.h" +#include "pwm_chip.h" +#include "regulator.h" +#include "spi.h" +#include "switch.h" +#include "tablet_mode.h" +#include "task.h" +#include "temp_sensor.h" +#include "timer.h" +#include "uart.h" +#include "usb_charge.h" +#include "usb_mux.h" +#include "usb_pd_tcpm.h" +#include "usbc_ppc.h" + +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) + +/* Initialize board. */ +static void board_init(void) +{ + /* Enable motion sensor interrupt */ + gpio_enable_interrupt(GPIO_BASE_IMU_INT_L); + gpio_enable_interrupt(GPIO_LID_ACCEL_INT_L); +} +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); + +/* Sensor */ +static struct mutex g_base_mutex; +static struct mutex g_lid_mutex; + +static struct bmi_drv_data_t g_bmi160_data; +static struct stprivate_data g_lis2dwl_data; + +#ifdef BOARD_ASURADA_REV0 +/* Matrix to rotate accelerometer into standard reference frame */ +/* for rev 0 */ +static const mat33_fp_t base_standard_ref_rev0 = { + {FLOAT_TO_FP(-1), 0, 0}, + {0, FLOAT_TO_FP(1), 0}, + {0, 0, FLOAT_TO_FP(-1)}, +}; + +static void update_rotation_matrix(void) +{ + motion_sensors[BASE_ACCEL].rot_standard_ref = + &base_standard_ref_rev0; + motion_sensors[BASE_GYRO].rot_standard_ref = + &base_standard_ref_rev0; +} +DECLARE_HOOK(HOOK_INIT, update_rotation_matrix, HOOK_PRIO_INIT_ADC + 2); + +/* TCS3400 private data */ +static struct als_drv_data_t g_tcs3400_data = { + .als_cal.scale = 1, + .als_cal.uscale = 0, + .als_cal.offset = 0, + .als_cal.channel_scale = { + .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kc */ + .cover_scale = ALS_CHANNEL_SCALE(1.0), /* CT */ + }, +}; + +static struct tcs3400_rgb_drv_data_t g_tcs3400_rgb_data = { + /* + * TODO: calculate the actual coefficients and scaling factors + */ + .calibration.rgb_cal[X] = { + .offset = 0, + .scale = { + .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kr */ + .cover_scale = ALS_CHANNEL_SCALE(1.0) + }, + .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(0), + }, + .calibration.rgb_cal[Y] = { + .offset = 0, + .scale = { + .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kg */ + .cover_scale = ALS_CHANNEL_SCALE(1.0) + }, + .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(0.1), + }, + .calibration.rgb_cal[Z] = { + .offset = 0, + .scale = { + .k_channel_scale = ALS_CHANNEL_SCALE(1.0), /* kb */ + .cover_scale = ALS_CHANNEL_SCALE(1.0) + }, + .coeff[TCS_RED_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_GREEN_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_BLUE_COEFF_IDX] = FLOAT_TO_FP(0), + .coeff[TCS_CLEAR_COEFF_IDX] = FLOAT_TO_FP(0), + }, + .calibration.irt = INT_TO_FP(1), + .saturation.again = TCS_DEFAULT_AGAIN, + .saturation.atime = TCS_DEFAULT_ATIME, +}; +#endif /* BOARD_ASURADA_REV0 */ + +#ifdef BOARD_HAYATO +/* Matrix to rotate accelerometer into standard reference frame */ +/* for Hayato */ +static const mat33_fp_t base_standard_ref = { + {0, FLOAT_TO_FP(1), 0}, + {FLOAT_TO_FP(-1), 0, 0}, + {0, 0, FLOAT_TO_FP(1)}, +}; + +static void update_rotation_matrix(void) +{ + if (board_get_version() >= 2) { + motion_sensors[BASE_ACCEL].rot_standard_ref = + &base_standard_ref; + motion_sensors[BASE_GYRO].rot_standard_ref = + &base_standard_ref; + } +} +DECLARE_HOOK(HOOK_INIT, update_rotation_matrix, HOOK_PRIO_INIT_ADC + 2); +#endif + +struct motion_sensor_t motion_sensors[] = { + /* + * Note: bmi160: supports accelerometer and gyro sensor + * Requirement: accelerometer sensor must init before gyro sensor + * DO NOT change the order of the following table. + */ + [BASE_ACCEL] = { + .name = "Base Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMI160, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_BASE, + .drv = &bmi160_drv, + .mutex = &g_base_mutex, + .drv_data = &g_bmi160_data, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS, + .rot_standard_ref = NULL, /* identity matrix */ + .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */ + .min_frequency = BMI_ACCEL_MIN_FREQ, + .max_frequency = BMI_ACCEL_MAX_FREQ, + .config = { + /* Sensor on for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + /* Sensor on for angle detection */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + .ec_rate = 100 * MSEC, + }, + }, + }, + [BASE_GYRO] = { + .name = "Base Gyro", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMI160, + .type = MOTIONSENSE_TYPE_GYRO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &bmi160_drv, + .mutex = &g_base_mutex, + .drv_data = &g_bmi160_data, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS, + .default_range = 1000, /* dps */ + .rot_standard_ref = NULL, /* identity matrix */ + .min_frequency = BMI_GYRO_MIN_FREQ, + .max_frequency = BMI_GYRO_MAX_FREQ, + }, + [LID_ACCEL] = { + .name = "Lid Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_LIS2DWL, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_LID, + .drv = &lis2dw12_drv, + .mutex = &g_lid_mutex, + .drv_data = &g_lis2dwl_data, + .int_signal = GPIO_LID_ACCEL_INT_L, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = LIS2DWL_ADDR1_FLAGS, + .flags = MOTIONSENSE_FLAG_INT_SIGNAL, + .rot_standard_ref = NULL, /* identity matrix */ + .default_range = 2, /* g */ + .min_frequency = LIS2DW12_ODR_MIN_VAL, + .max_frequency = LIS2DW12_ODR_MAX_VAL, + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 12500 | ROUND_UP_FLAG, + }, + /* Sensor on for lid angle detection */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + }, + }, +#ifdef BOARD_ASURADA_REV0 + [CLEAR_ALS] = { + .name = "Clear Light", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_TCS3400, + .type = MOTIONSENSE_TYPE_LIGHT, + .location = MOTIONSENSE_LOC_LID, + .drv = &tcs3400_drv, + .drv_data = &g_tcs3400_data, + .port = I2C_PORT_ACCEL, + .i2c_spi_addr_flags = TCS3400_I2C_ADDR_FLAGS, + .rot_standard_ref = NULL, + .default_range = 0x10000, /* scale = 1x, uscale = 0 */ + .min_frequency = TCS3400_LIGHT_MIN_FREQ, + .max_frequency = TCS3400_LIGHT_MAX_FREQ, + .config = { + /* Run ALS sensor in S0 */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 1000, + }, + }, + }, + [RGB_ALS] = { + .name = "RGB Light", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_TCS3400, + .type = MOTIONSENSE_TYPE_LIGHT_RGB, + .location = MOTIONSENSE_LOC_LID, + .drv = &tcs3400_rgb_drv, + .drv_data = &g_tcs3400_rgb_data, + .rot_standard_ref = NULL, + .default_range = 0x10000, /* scale = 1x, uscale = 0 */ + /* freq = 0 indicates we should not use sensor directly */ + .min_frequency = 0, + .max_frequency = 0, + }, +#endif /* BOARD_ASURADA_REV0 */ +}; +const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); + +int board_accel_force_mode_mask(void) +{ + int version = board_get_version(); + + if (version == -1 || version >= 2) + return 0; + return BIT(LID_ACCEL); +} diff --git a/board/cherry/board.h b/board/cherry/board.h new file mode 100644 index 0000000000..712b099cec --- /dev/null +++ b/board/cherry/board.h @@ -0,0 +1,109 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ +/* Asurada board configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +#include "baseboard.h" + +/* Chipset config */ +#define CONFIG_BRINGUP + +/* Optional features */ +#define CONFIG_SYSTEM_UNLOCKED +#define CONFIG_LTO + +/* + * TODO: Remove this option once the VBAT no longer keeps high when + * system's power isn't presented. + */ +#define CONFIG_IT83XX_RESET_PD_CONTRACT_IN_BRAM + +/* BC12 */ +/* TODO(b/159583342): remove after rev0 deprecated */ +#define CONFIG_MT6360_BC12_GPIO + +/* LED */ +#ifdef BOARD_HAYATO +#define CONFIG_LED_POWER_LED +#define CONFIG_LED_ONOFF_STATES +#define CONFIG_LED_ONOFF_STATES_BAT_LOW 10 +#endif + +/* PD / USB-C / PPC */ +#define CONFIG_USB_PD_DEBUG_LEVEL 3 + +/* Optional console commands */ +#define CONFIG_CMD_FLASH +#define CONFIG_CMD_SCRATCHPAD +#define CONFIG_CMD_STACKOVERFLOW + +/* Sensor */ +#define CONFIG_GMR_TABLET_MODE +#define CONFIG_TABLET_MODE +#define CONFIG_TABLET_MODE_SWITCH +#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L + +#define CONFIG_ACCELGYRO_BMI160 /* Base accel */ +#define CONFIG_ACCELGYRO_BMI160_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) + +#define CONFIG_ACCEL_LIS2DWL +#define CONFIG_ACCEL_LIS2DW_AS_BASE +#define CONFIG_ACCEL_LIS2DW12_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(LID_ACCEL) + +#define CONFIG_LID_ANGLE +#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL +#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL +#define CONFIG_LID_ANGLE_UPDATE + +#ifdef BOARD_ASURADA_REV0 +#define CONFIG_ALS +#define ALS_COUNT 1 +#define CONFIG_ALS_TCS3400 +#define CONFIG_ALS_TCS3400_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(CLEAR_ALS) +#define CONFIG_ALS_TCS3400_EMULATED_IRQ_EVENT + +#define CONFIG_ACCEL_FORCE_MODE_MASK (BIT(LID_ACCEL) | BIT(CLEAR_ALS)) +#else +/* TODO(b/171931139): remove this after rev1 board deprecated */ +#define CONFIG_ACCEL_FORCE_MODE_MASK (board_accel_force_mode_mask()) +#endif + +/* SPI / Host Command */ +#undef CONFIG_HOSTCMD_DEBUG_MODE +#define CONFIG_HOSTCMD_DEBUG_MODE HCDEBUG_OFF + +/* USB-A */ +#define USBA_PORT_COUNT 1 + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" +#include "registers.h" + +enum battery_type { + BATTERY_C235, + BATTERY_TYPE_COUNT, +}; + +enum sensor_id { + BASE_ACCEL = 0, + BASE_GYRO, + LID_ACCEL, +#ifdef BOARD_ASURADA_REV0 + CLEAR_ALS, + RGB_ALS, +#endif + SENSOR_COUNT, +}; + +int board_accel_force_mode_mask(void); + +#endif /* !__ASSEMBLER__ */ +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/cherry/build.mk b/board/cherry/build.mk new file mode 100644 index 0000000000..d7b24f8e4f --- /dev/null +++ b/board/cherry/build.mk @@ -0,0 +1,15 @@ +# -*- makefile -*- +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Board specific files build + +# the IC is ITE IT8xxx2 +CHIP:=it83xx +CHIP_FAMILY:=it8xxx2 +CHIP_VARIANT:=it81202bx_1024 +BASEBOARD:=cherry + +board-y+=led.o +board-y+=battery.o board.o diff --git a/board/cherry/ec.tasklist b/board/cherry/ec.tasklist new file mode 100644 index 0000000000..75dbb1a828 --- /dev/null +++ b/board/cherry/ec.tasklist @@ -0,0 +1,22 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/** + * See CONFIG_TASK_LIST in config.h for details. + */ +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P0, usb_charger_task, 0, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P1, usb_charger_task, 1, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_NOTEST(PDCMD, pd_command_task, NULL, 1024) \ + TASK_ALWAYS(HOSTCMD, host_command_task, NULL, 1024) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, 1280) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, 1280) \ + diff --git a/board/cherry/gpio.inc b/board/cherry/gpio.inc new file mode 100644 index 0000000000..1bd0b8ea4a --- /dev/null +++ b/board/cherry/gpio.inc @@ -0,0 +1,170 @@ +/* -*- mode:c -*- + * + * Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Declare symbolic names for all the GPIOs that we care about. + * Note: Those with interrupt handlers must be declared first. */ + +/* Wake Source interrupts */ +GPIO_INT(POWER_BUTTON_L, PIN(E, 4), GPIO_INT_BOTH | GPIO_PULL_UP | + GPIO_HIB_WAKE_HIGH, power_button_interrupt) /* H1_EC_PWR_BTN_ODL */ +GPIO_INT(LID_OPEN, PIN(E, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, + lid_interrupt) +GPIO_INT(TABLET_MODE_L, PIN(J, 7), GPIO_INT_BOTH, + gmr_tablet_switch_isr) + +/* Chipset interrupts */ +GPIO_INT(AP_EC_WARM_RST_REQ, PIN(D, 3), GPIO_INT_RISING | GPIO_SEL_1P8V, + chipset_reset_request_interrupt) + +/* Power sequencing interrupts */ +GPIO_INT(AP_EC_WATCHDOG_L, PIN(C, 7), GPIO_INT_BOTH | GPIO_SEL_1P8V, + chipset_watchdog_interrupt) +GPIO_INT(AP_IN_SLEEP_L, PIN(F, 2), + GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt) +GPIO_INT(PMIC_EC_PWRGD, PIN(F, 3), + GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt) + +/* Sensor Interrupts */ +GPIO_INT(BASE_IMU_INT_L, PIN(J, 2), GPIO_INT_FALLING | GPIO_SEL_1P8V, + bmi160_interrupt) +GPIO_INT(LID_ACCEL_INT_L, PIN(J, 3), GPIO_INT_FALLING | GPIO_SEL_1P8V, + lis2dw12_interrupt) +#ifdef BOARD_ASURADA_REV0 +GPIO_INT(ALS_RGB_INT_ODL, PIN(F, 0), GPIO_INT_FALLING, + tcs3400_interrupt) +#else +GPIO(ALS_RGB_INT_ODL, PIN(F, 0), GPIO_INPUT) +#endif + +/* USB-C interrupts */ +GPIO_INT(USB_C0_PPC_INT_ODL, PIN(D, 1), GPIO_INT_BOTH, ppc_interrupt) +GPIO_INT(USB_C0_BC12_INT_ODL,PIN(J, 6), GPIO_INT_FALLING, bc12_interrupt) +GPIO_INT(USB_C1_BC12_INT_L, PIN(J, 4), GPIO_INT_FALLING, bc12_interrupt) + +/* Volume button interrupts */ +/* Note that netnames are reversed in asurada rev 0/1 */ +GPIO_INT(VOLUME_DOWN_L, PIN(D, 5), GPIO_INT_BOTH | GPIO_PULL_UP, + button_interrupt) /* EC_VOLDN_BTN_ODL */ +GPIO_INT(VOLUME_UP_L, PIN(D, 6), GPIO_INT_BOTH | GPIO_PULL_UP, + button_interrupt) /* EC_VOLUP_BTN_ODL */ + +/* Other interrupts */ +#ifdef BOARD_ASURADA_REV0 +GPIO_INT(AC_PRESENT, PIN(M, 2), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, + extpower_interrupt) /* AC_OK / AC_PRESENT in rev0 */ +#else /* HAYATO */ +GPIO_INT(AC_PRESENT, PIN(E, 5), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, + extpower_interrupt) /* AC_OK / AC_PRESENT in rev1+ */ +#endif +GPIO_INT(UART1_RX, PIN(B, 0), GPIO_INT_FALLING, + uart_deepsleep_interrupt) /* UART_DEBUG_TX_EC_RX */ +GPIO_INT(WP, PIN(I, 4), GPIO_INT_BOTH | GPIO_SEL_1P8V, + switch_interrupt) /* EC_FLASH_WP_OD */ +GPIO_INT(SPI0_CS, PIN(M, 5), GPIO_INT_FALLING, + spi_event) /* SPI slave Chip Select -- AP_SPI_EC_CS_L */ +GPIO_INT(X_EC_GPIO2, PIN(B, 2), GPIO_ODR_HIGH, x_ec_interrupt) + +/* Power Sequencing Signals */ +GPIO(EC_PMIC_EN_ODL, PIN(D, 0), GPIO_ODR_HIGH | GPIO_SEL_1P8V) +GPIO(EC_PMIC_WATCHDOG_L, PIN(H, 0), GPIO_ODR_LOW | GPIO_SEL_1P8V) +GPIO(EN_PP5000_A, PIN(C, 6), GPIO_OUT_HIGH) +GPIO(PG_MT6315_PROC_ODL, PIN(E, 1), GPIO_INPUT) +GPIO(PG_MT6360_ODL, PIN(F, 1), GPIO_INPUT) +GPIO(PG_PP5000_A_ODL, PIN(A, 6), GPIO_INPUT) +GPIO(EN_SLP_Z, PIN(E, 3), GPIO_OUT_LOW) +GPIO(SYS_RST_ODL, PIN(B, 6), GPIO_ODR_LOW) +GPIO(EC_BL_EN_OD, PIN(B, 5), GPIO_ODR_LOW | GPIO_SEL_1P8V) + +/* MKBP event synchronization */ +GPIO(EC_INT_L, PIN(E, 6), GPIO_ODR_HIGH | GPIO_SEL_1P8V) /* EC_AP_INT_ODL */ + +/* USB and USBC Signals */ +GPIO(DP_AUX_PATH_SEL, PIN(G, 0), GPIO_OUT_HIGH) +GPIO(EC_DPBRDG_HPD_ODL, PIN(J, 0), GPIO_ODR_HIGH | GPIO_SEL_1P8V) +GPIO(EN_PP5000_USB_A0_VBUS, PIN(B, 7), GPIO_OUT_LOW) +GPIO(USB_C0_FRS_EN, PIN(H, 3), GPIO_OUT_LOW) + +/* Misc Signals */ +GPIO(EC_BATT_PRES_ODL, PIN(C, 0), GPIO_INPUT) +GPIO(BC12_DET_EN, PIN(J, 5), GPIO_OUT_LOW) /* EN_USB_C0_BC12_DET */ +GPIO(EN_EC_ID_ODL, PIN(H, 5), GPIO_ODR_LOW) +GPIO(ENTERING_RW, PIN(C, 5), GPIO_OUT_LOW) /* EC_ENTERING_RW */ +GPIO(EC_USB_C0_MUX_RESET_L, PIN(D, 7), GPIO_OUT_HIGH) + +/* I2C pins - Alternate function below configures I2C module on these pins */ +GPIO(I2C_A_SCL, PIN(B, 3), GPIO_INPUT) /* I2C_CHG_BATT_SCL */ +GPIO(I2C_A_SDA, PIN(B, 4), GPIO_INPUT) /* I2C_CHG_BATT_SDA */ +GPIO(I2C_B_SCL, PIN(C, 1), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_SENSOR_SCL */ +GPIO(I2C_B_SDA, PIN(C, 2), GPIO_INPUT | GPIO_SEL_1P8V) /* I2C_SENSOR_SDA */ +GPIO(I2C_C_SCL, PIN(F, 6), GPIO_INPUT) /* I2C_USB_C0_SCL */ +GPIO(I2C_C_SDA, PIN(F, 7), GPIO_INPUT) /* I2C_USB_C0_SCL */ +GPIO(I2C_E_SCL, PIN(E, 0), GPIO_INPUT) /* I2C_USB_C1_SCL */ +GPIO(I2C_E_SDA, PIN(E, 7), GPIO_INPUT) /* I2C_USB_C1_SDA */ + +/* SPI pins - Alternate function below configures SPI module on these pins */ + +/* NC / TP */ + +/* Keyboard pins */ + +/* Subboards HDMI/TYPEC */ +GPIO(EC_X_GPIO1, PIN(H, 4), GPIO_OUT_LOW) +GPIO(EC_X_GPIO3, PIN(J, 1), GPIO_INPUT) + +/* Alternate functions GPIO definitions */ +ALTERNATE(PIN_MASK(B, 0x18), 1, MODULE_I2C, 0) /* I2C A */ +ALTERNATE(PIN_MASK(C, 0x06), 1, MODULE_I2C, GPIO_SEL_1P8V) /* I2C B */ +ALTERNATE(PIN_MASK(F, 0xC0), 1, MODULE_I2C, 0) /* I2C C */ +ALTERNATE(PIN_MASK(E, 0x81), 1, MODULE_I2C, 0) /* I2C E */ + +/* UART */ +ALTERNATE(PIN_MASK(B, 0x03), 1, MODULE_UART, 0) /* EC to Servo */ + +/* PWM */ +ALTERNATE(PIN_MASK(A, 0x07), 1, MODULE_PWM, 0) /* PWM 0~2 */ + +/* ADC */ +ALTERNATE(PIN_MASK(I, 0x4F), 0, MODULE_ADC, 0) /* ADC 0,1,2,3,6 */ + +/* SPI */ +ALTERNATE(PIN_MASK(M, 0x33), 0, MODULE_SPI, 0) /* SPI */ + +/* Unimplemented Pins */ +GPIO(SET_VMC_VOLT_AT_1V8, PIN(D, 4), GPIO_INPUT | GPIO_PULL_DOWN | GPIO_SEL_1P8V) +GPIO(EN_PP3000_VMC_PMU, PIN(D, 2), GPIO_INPUT | GPIO_PULL_DOWN | GPIO_SEL_1P8V) +GPIO(PACKET_MODE_EN, PIN(A, 3), GPIO_INPUT | GPIO_PULL_DOWN) +/* b/160218054: behavior not defined */ +/* *_ODL pin has external pullup so don't pull it down. */ +GPIO(USB_A0_FAULT_ODL, PIN(A, 7), GPIO_INPUT) +GPIO(CHARGER_PROCHOT_ODL, PIN(C, 3), GPIO_INPUT) +GPIO(PG_MT6315_GPU_ODL, PIN(H, 6), GPIO_INPUT) +GPIO(EN_PP3000_SD_U, PIN(G, 1), GPIO_INPUT | GPIO_PULL_DOWN | GPIO_SEL_1P8V) +/* reserved for future use */ +GPIO(CCD_MODE_ODL, PIN(C, 4), GPIO_INPUT) +/* + * ADC pins don't have internal pull-down capability, + * so we set them as output low. + */ +GPIO(NC_GPI5, PIN(I, 5), GPIO_OUT_LOW) +GPIO(NC_GPI7, PIN(I, 7), GPIO_OUT_LOW) +/* NC pins, enable internal pull-up/down to avoid floating state. */ +#ifdef BOARD_ASURADA_REV0 +GPIO(NC_GPE5, PIN(E, 5), GPIO_INPUT | GPIO_PULL_UP) +#else /* HAYATO */ +GPIO(NC_GPM2, PIN(M, 2), GPIO_INPUT | GPIO_PULL_DOWN) +#endif +GPIO(NC_GPM3, PIN(M, 3), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(NC_GPM6, PIN(M, 6), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(SPI_CLK_GPG6, PIN(G, 6), GPIO_INPUT | GPIO_PULL_UP) +/* + * These 4 pins don't have internal pull-down capability, + * so we set them as output low. + */ +GPIO(NC_GPG3, PIN(G, 3), GPIO_OUT_LOW) +GPIO(SPI_MOSI_GPG4, PIN(G, 4), GPIO_OUT_LOW) +GPIO(SPI_MISO_GPG5, PIN(G, 5), GPIO_OUT_LOW) +GPIO(SPI_CS_GPG7, PIN(G, 7), GPIO_OUT_LOW) diff --git a/board/cherry/led.c b/board/cherry/led.c new file mode 100644 index 0000000000..0a58cddd64 --- /dev/null +++ b/board/cherry/led.c @@ -0,0 +1,205 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Power and battery LED control for Asurada + */ +#include "charge_manager.h" +#include "charge_state.h" +#include "common.h" +#include "console.h" +#include "driver/bc12/mt6360.h" +#include "hooks.h" +#include "led_common.h" +#include "pwm.h" +#include "stdbool.h" +#include "util.h" + +#define CPRINTS(format, args...) cprints(CC_PWM, format, ## args) + +#define LED_OFF EC_LED_COLOR_COUNT + +const enum ec_led_id supported_led_ids[] = { + /* Main LED */ + EC_LED_ID_LEFT_LED, + EC_LED_ID_RIGHT_LED, + + /* Not used, give them some random name for testing */ + EC_LED_ID_POWER_LED, + EC_LED_ID_BATTERY_LED +}; +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +static void led_set_color_left(enum ec_led_colors color, int duty) +{ + mt6360_led_set_brightness(MT6360_LED_RGB2, duty); + mt6360_led_set_brightness(MT6360_LED_RGB3, duty); + + switch (color) { + case EC_LED_COLOR_AMBER: + mt6360_led_enable(MT6360_LED_RGB2, 0); + mt6360_led_enable(MT6360_LED_RGB3, 1); + break; + case EC_LED_COLOR_WHITE: + mt6360_led_enable(MT6360_LED_RGB2, 1); + mt6360_led_enable(MT6360_LED_RGB3, 0); + break; + default: /* LED_OFF and other unsupported colors */ + mt6360_led_enable(MT6360_LED_RGB2, 0); + mt6360_led_enable(MT6360_LED_RGB3, 0); + break; + } +} + +static void led_set_color_right(enum ec_led_colors color, int duty) +{ + pwm_set_duty(PWM_CH_LED2, duty); + pwm_set_duty(PWM_CH_LED3, duty); + + switch (color) { + case EC_LED_COLOR_AMBER: + pwm_enable(PWM_CH_LED2, 0); + pwm_enable(PWM_CH_LED3, 1); + break; + case EC_LED_COLOR_WHITE: + pwm_enable(PWM_CH_LED2, 1); + pwm_enable(PWM_CH_LED3, 0); + break; + default: /* LED_OFF and other unsupported colors */ + pwm_enable(PWM_CH_LED2, 0); + pwm_enable(PWM_CH_LED3, 0); + break; + } +} + +static void led_set_color_power(enum ec_led_colors color, int duty) +{ + pwm_set_duty(PWM_CH_LED1, duty); + pwm_enable(PWM_CH_LED1, color == EC_LED_COLOR_WHITE); +} + +static void led_set_color_battery(enum ec_led_colors color, int duty) +{ + mt6360_led_set_brightness(MT6360_LED_RGB1, duty); + mt6360_led_enable(MT6360_LED_RGB1, color == EC_LED_COLOR_WHITE); +} + +static enum ec_error_list set_color(enum ec_led_id led_id, + enum ec_led_colors color, + int duty) +{ + switch (led_id) { + case EC_LED_ID_LEFT_LED: + led_set_color_left(color, duty); + return EC_SUCCESS; + case EC_LED_ID_RIGHT_LED: + led_set_color_right(color, duty); + return EC_SUCCESS; + case EC_LED_ID_POWER_LED: + led_set_color_power(color, duty); + return EC_SUCCESS; + case EC_LED_ID_BATTERY_LED: + led_set_color_battery(color, duty); + return EC_SUCCESS; + default: + return EC_ERROR_INVAL; + } +} + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + switch (led_id) { + case EC_LED_ID_LEFT_LED: + brightness_range[EC_LED_COLOR_AMBER] = + MT6360_LED_BRIGHTNESS_MAX; + brightness_range[EC_LED_COLOR_WHITE] = + MT6360_LED_BRIGHTNESS_MAX; + break; + case EC_LED_ID_RIGHT_LED: + brightness_range[EC_LED_COLOR_AMBER] = 100; + brightness_range[EC_LED_COLOR_WHITE] = 100; + break; + case EC_LED_ID_POWER_LED: + brightness_range[EC_LED_COLOR_WHITE] = 100; + break; + case EC_LED_ID_BATTERY_LED: + brightness_range[EC_LED_COLOR_WHITE] = + MT6360_LED_BRIGHTNESS_MAX; + break; + default: + break; + } +} + +int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) +{ + if (brightness[EC_LED_COLOR_AMBER]) + return set_color(led_id, EC_LED_COLOR_AMBER, + brightness[EC_LED_COLOR_AMBER]); + if (brightness[EC_LED_COLOR_WHITE]) + return set_color(led_id, EC_LED_COLOR_WHITE, + brightness[EC_LED_COLOR_WHITE]); + + return set_color(led_id, LED_OFF, 0); +} + +static void update_led(enum ec_led_id led_id, bool is_active_charge_port, + int duty, int tick) +{ + enum charge_state power_state = charge_get_state(); + + if (power_state == PWR_STATE_IDLE) { + /* Factory mode: blinking white (2sec on + 2sec off) */ + set_color(led_id, (tick % 8 < 4) ? EC_LED_COLOR_WHITE : LED_OFF, + duty); + } else if (power_state == PWR_STATE_ERROR) { + /* Battery error: blinking amber (1sec on + 1sec off) */ + set_color(led_id, (tick % 4 < 2) ? EC_LED_COLOR_AMBER : LED_OFF, + duty); + } else if (is_active_charge_port) { + /* + * Active charge port: amber when charging, white if fully + * charged. + */ + if (power_state == PWR_STATE_CHARGE) + set_color(led_id, EC_LED_COLOR_AMBER, duty); + else + set_color(led_id, EC_LED_COLOR_WHITE, duty); + } else { + /* + * Non-active port: + * Solid white in S0, blinking amber (3sec on + 1sec off) in S3, + * and LED off in S5 + */ + if (chipset_in_state(CHIPSET_STATE_ON)) + set_color(led_id, EC_LED_COLOR_WHITE, duty); + else if (chipset_in_state(CHIPSET_STATE_ANY_SUSPEND)) + set_color( + led_id, + (tick % 8 < 6) ? EC_LED_COLOR_AMBER : LED_OFF, + duty); + else + set_color(led_id, LED_OFF, 0); + + } +} + +static void led_tick(void) +{ + static int tick; + int port = charge_manager_get_active_charge_port(); + + ++tick; + /* Pick duty 1 and 50 respectively to have same brightness */ + if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED)) + update_led(EC_LED_ID_LEFT_LED, port == 0, 1, tick); + if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) + update_led(EC_LED_ID_RIGHT_LED, port == 1, 50, tick); + /* Turn off unused LEDs */ + if (led_auto_control_is_enabled(EC_LED_ID_POWER_LED)) + set_color(EC_LED_ID_POWER_LED, LED_OFF, 0); + if (led_auto_control_is_enabled(EC_LED_ID_BATTERY_LED)) + set_color(EC_LED_ID_BATTERY_LED, LED_OFF, 0); +} +DECLARE_HOOK(HOOK_TICK, led_tick, HOOK_PRIO_DEFAULT); +DECLARE_HOOK(HOOK_INIT, led_tick, HOOK_PRIO_DEFAULT); -- cgit v1.2.1