From 8ca44cb4eca69d44e9fce0b93b58be9c7d9d19f3 Mon Sep 17 00:00:00 2001 From: Vijay Hiremath Date: Thu, 30 May 2019 16:25:15 -0700 Subject: intel_x86/power: Consolidate chipset specific power signals array Currently chipset specific power signals are defined at board/baseboard level. These power signals are moved to chipset specific file to minimize the redundant power signals array defined for each board/baseboard. BUG=b:134079574 BRANCH=none TEST=make buildall -j Change-Id: I351904f7cd2e0f27844c0711beb118d390219581 Signed-off-by: Vijay Hiremath Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1636837 Reviewed-by: Aseda Aboagye --- baseboard/kalista/baseboard.c | 11 ----------- 1 file changed, 11 deletions(-) (limited to 'baseboard/kalista/baseboard.c') diff --git a/baseboard/kalista/baseboard.c b/baseboard/kalista/baseboard.c index 5956223f48..7cf73be3e6 100644 --- a/baseboard/kalista/baseboard.c +++ b/baseboard/kalista/baseboard.c @@ -91,17 +91,6 @@ void vbus0_evt(enum gpio_signal signal) #include "gpio_list.h" -/* power signal list. Must match order of enum power_signal. */ -const struct power_signal_info power_signal_list[] = { - {GPIO_PCH_SLP_S0_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S0_DEASSERTED"}, - {VW_SLP_S3_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S3_DEASSERTED"}, - {VW_SLP_S4_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_S4_DEASSERTED"}, - {GPIO_PCH_SLP_SUS_L, POWER_SIGNAL_ACTIVE_HIGH, "SLP_SUS_DEASSERTED"}, - {GPIO_RSMRST_L_PGOOD, POWER_SIGNAL_ACTIVE_HIGH, "RSMRST_L_PGOOD"}, - {GPIO_PMIC_DPWROK, POWER_SIGNAL_ACTIVE_HIGH, "PMIC_DPWROK"}, -}; -BUILD_ASSERT(ARRAY_SIZE(power_signal_list) == POWER_SIGNAL_COUNT); - /* Hibernate wake configuration */ const enum gpio_signal hibernate_wake_pins[] = { GPIO_POWER_BUTTON_L, -- cgit v1.2.1