From 9e422c3c05fdd324565049b09be27c446f9dc0ca Mon Sep 17 00:00:00 2001 From: Yuval Peress Date: Thu, 14 Jan 2021 01:29:08 -0700 Subject: Refactor CONFIG_FLASH_SIZE to CONFIG_FLASH_SIZE_BYTES In Zephyr CONFIG_FLASH_SIZE is a Kconfig value that is used throughout. The issue is that the units don't match. In Zephyr the value is in KiB instead of bytes. This refactor simply renames CONFIG_FLASH_SIZE in platform/ec to include the unit (via _BYTES). BRANCH=none BUG=b:174873770 TEST=make buildall be generated by the build instead of per board Signed-off-by: Yuval Peress Change-Id: I44bf3c7a20fcf62aaa9ae15715be78db4210f384 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2627638 Reviewed-by: Jack Rosenthal Reviewed-by: Simon Glass Reviewed-by: Tom Hughes Commit-Queue: Jack Rosenthal --- baseboard/dedede/baseboard.h | 2 +- baseboard/grunt/baseboard.h | 2 +- baseboard/hatch/baseboard.h | 2 +- baseboard/kalista/baseboard.h | 4 ++-- baseboard/nucleo-f412zg/base-board.h | 2 +- baseboard/nucleo-h743zi/base-board.h | 7 ++++--- baseboard/octopus/baseboard.h | 2 +- baseboard/volteer/baseboard.h | 2 +- baseboard/zork/baseboard.h | 2 +- 9 files changed, 13 insertions(+), 12 deletions(-) (limited to 'baseboard') diff --git a/baseboard/dedede/baseboard.h b/baseboard/dedede/baseboard.h index 691456e6ee..63ff61ac16 100644 --- a/baseboard/dedede/baseboard.h +++ b/baseboard/dedede/baseboard.h @@ -28,7 +28,7 @@ #define NPCX_TACH_SEL2 0 /* No tach. */ /* Internal SPI flash on NPCX7 */ - #define CONFIG_FLASH_SIZE (512 * 1024) + #define CONFIG_FLASH_SIZE_BYTES (512 * 1024) #define CONFIG_SPI_FLASH_REGS #define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */ #elif defined(VARIANT_DEDEDE_EC_IT8320) diff --git a/baseboard/grunt/baseboard.h b/baseboard/grunt/baseboard.h index c5d3a5dde5..ecb1063706 100644 --- a/baseboard/grunt/baseboard.h +++ b/baseboard/grunt/baseboard.h @@ -20,7 +20,7 @@ /* Internal SPI flash on NPCX7 */ /* Flash is 1MB but reserve half for future use. */ -#define CONFIG_FLASH_SIZE (512 * 1024) +#define CONFIG_FLASH_SIZE_BYTES (512 * 1024) #define CONFIG_SPI_FLASH_REGS #define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */ diff --git a/baseboard/hatch/baseboard.h b/baseboard/hatch/baseboard.h index 0655fdeab5..24cc045893 100644 --- a/baseboard/hatch/baseboard.h +++ b/baseboard/hatch/baseboard.h @@ -22,7 +22,7 @@ #define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */ #define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */ /* Internal SPI flash on NPCX796FC is 512 kB */ -#define CONFIG_FLASH_SIZE (512 * 1024) +#define CONFIG_FLASH_SIZE_BYTES (512 * 1024) #define CONFIG_SPI_FLASH_REGS #define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */ #define CONFIG_I2C diff --git a/baseboard/kalista/baseboard.h b/baseboard/kalista/baseboard.h index 708a8ba990..97b91d886f 100644 --- a/baseboard/kalista/baseboard.h +++ b/baseboard/kalista/baseboard.h @@ -28,7 +28,7 @@ #define CONFIG_KEYBOARD_PROTOCOL_MKBP #define CONFIG_MKBP_USE_HOST_EVENT #define CONFIG_DPTF -#define CONFIG_FLASH_SIZE 0x80000 +#define CONFIG_FLASH_SIZE_BYTES 0x80000 #define CONFIG_FPU #define CONFIG_I2C #define CONFIG_I2C_CONTROLLER @@ -143,7 +143,7 @@ #define CONFIG_RW_B #define CONFIG_RW_B_MEM_OFF CONFIG_RO_MEM_OFF #undef CONFIG_RO_SIZE -#define CONFIG_RO_SIZE (CONFIG_FLASH_SIZE / 4) +#define CONFIG_RO_SIZE (CONFIG_FLASH_SIZE_BYTES / 4) #undef CONFIG_RW_SIZE #define CONFIG_RW_SIZE CONFIG_RO_SIZE #define CONFIG_RW_A_STORAGE_OFF CONFIG_RW_STORAGE_OFF diff --git a/baseboard/nucleo-f412zg/base-board.h b/baseboard/nucleo-f412zg/base-board.h index 7b69fde7c5..31b4a73131 100644 --- a/baseboard/nucleo-f412zg/base-board.h +++ b/baseboard/nucleo-f412zg/base-board.h @@ -62,7 +62,7 @@ #define CONFIG_RW_MEM_OFF (CONFIG_ROLLBACK_OFF + CONFIG_ROLLBACK_SIZE) #define CONFIG_RW_STORAGE_OFF 0 -#define CONFIG_RW_SIZE (CONFIG_FLASH_SIZE - \ +#define CONFIG_RW_SIZE (CONFIG_FLASH_SIZE_BYTES - \ (CONFIG_RW_MEM_OFF - CONFIG_RO_MEM_OFF)) #define CONFIG_EC_PROTECTED_STORAGE_OFF CONFIG_RO_MEM_OFF diff --git a/baseboard/nucleo-h743zi/base-board.h b/baseboard/nucleo-h743zi/base-board.h index 0bf91efd83..52744da323 100644 --- a/baseboard/nucleo-h743zi/base-board.h +++ b/baseboard/nucleo-h743zi/base-board.h @@ -54,12 +54,13 @@ * We need 2 independently erasable blocks, at a minimum. */ #define CONFIG_ROLLBACK_SIZE (2 * CONFIG_FLASH_BANK_SIZE) -#define CONFIG_ROLLBACK_OFF ((CONFIG_FLASH_SIZE / 2) - CONFIG_ROLLBACK_SIZE) +#define CONFIG_ROLLBACK_OFF ((CONFIG_FLASH_SIZE_BYTES / 2) - \ + CONFIG_ROLLBACK_SIZE) #define CONFIG_RO_MEM_OFF 0 #define CONFIG_RO_SIZE CONFIG_ROLLBACK_OFF -#define CONFIG_RW_MEM_OFF (CONFIG_FLASH_SIZE / 2) -#define CONFIG_RW_SIZE (CONFIG_FLASH_SIZE / 2) +#define CONFIG_RW_MEM_OFF (CONFIG_FLASH_SIZE_BYTES / 2) +#define CONFIG_RW_SIZE (CONFIG_FLASH_SIZE_BYTES / 2) #define CONFIG_RO_STORAGE_OFF 0 #define CONFIG_RW_STORAGE_OFF 0 diff --git a/baseboard/octopus/baseboard.h b/baseboard/octopus/baseboard.h index 1f64338e25..261c494752 100644 --- a/baseboard/octopus/baseboard.h +++ b/baseboard/octopus/baseboard.h @@ -35,7 +35,7 @@ /* Internal SPI flash on NPCX7 */ /* Flash is 1MB but reserve half for future use. */ - #define CONFIG_FLASH_SIZE (512 * 1024) + #define CONFIG_FLASH_SIZE_BYTES (512 * 1024) #define CONFIG_SPI_FLASH_REGS #define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */ diff --git a/baseboard/volteer/baseboard.h b/baseboard/volteer/baseboard.h index 8a3095ac2e..c5c4fc268b 100644 --- a/baseboard/volteer/baseboard.h +++ b/baseboard/volteer/baseboard.h @@ -19,7 +19,7 @@ #define NPCX7_PWM1_SEL 1 /* GPIO C2 is used as PWM1. */ #define NPCX_UART_MODULE2 1 /* GPIO64/65 are used as UART pins. */ /* Internal SPI flash on NPCX796FC is 512 kB */ -#define CONFIG_FLASH_SIZE (512 * 1024) +#define CONFIG_FLASH_SIZE_BYTES (512 * 1024) #define CONFIG_SPI_FLASH_REGS #define CONFIG_SPI_FLASH_W25Q80 /* Internal SPI flash type. */ diff --git a/baseboard/zork/baseboard.h b/baseboard/zork/baseboard.h index 2a9827ca9a..9482ee02be 100644 --- a/baseboard/zork/baseboard.h +++ b/baseboard/zork/baseboard.h @@ -19,7 +19,7 @@ #define NPCX7_PWM1_SEL 0 /* GPIO C2 is not used as PWM1. */ /* Internal SPI flash on NPCX7 */ -#define CONFIG_FLASH_SIZE (512 * 1024) +#define CONFIG_FLASH_SIZE_BYTES (512 * 1024) #define CONFIG_SPI_FLASH_REGS #define CONFIG_SPI_FLASH_W25Q40 /* Internal SPI flash type. */ -- cgit v1.2.1