From a9e2234713340cdb90650a1e78e503f8f3187971 Mon Sep 17 00:00:00 2001 From: Vijay Hiremath Date: Mon, 12 Apr 2021 16:59:35 -0700 Subject: ADLRVP: Make code robust for validating TCPC vendors Intel Reference Validation Platform is designed to test multiple combinations of hardware thus help enable vendors seamlessly. Added task based TCPC code enablement so that TCPC vendors can easily hook their hardware, make the code changes and validate their TCPC. BUG=none BRANCH=none TEST=make buildall -j Change-Id: I989b6a35c6ff3f96150d09de11458886f9642d1f Signed-off-by: Vijay Hiremath Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2823167 Reviewed-by: Sooraj Govindan Reviewed-by: caveh jalali --- board/adlrvpp_ite/board.c | 4 ++-- board/adlrvpp_ite/board.h | 2 -- board/adlrvpp_ite/gpio.inc | 27 +++++++++++++++++---------- 3 files changed, 19 insertions(+), 14 deletions(-) (limited to 'board/adlrvpp_ite') diff --git a/board/adlrvpp_ite/board.c b/board/adlrvpp_ite/board.c index 3e39b4888d..835cdcb986 100644 --- a/board/adlrvpp_ite/board.c +++ b/board/adlrvpp_ite/board.c @@ -64,8 +64,6 @@ const struct i2c_port_t i2c_ports[] = { .scl = GPIO_USBC_TCPC_I2C_CLK_P1, .sda = GPIO_USBC_TCPC_I2C_DATA_P1, }, -#endif -#if defined(HAS_TASK_PD_C3) [I2C_CHAN_TYPEC_3] = { .name = "typec_3", .port = IT83XX_I2C_CH_D, @@ -85,6 +83,7 @@ const struct tcpc_config_t tcpc_config[] = { /* TCPC is embedded within EC so no i2c config needed */ .drv = &it83xx_tcpm_drv, }, +#if defined(HAS_TASK_PD_C1) [TYPE_C_PORT_1] = { .bus_type = EC_BUS_TYPE_I2C, .i2c_info = { @@ -93,6 +92,7 @@ const struct tcpc_config_t tcpc_config[] = { }, .drv = &fusb302_tcpm_drv, }, +#endif #if defined(HAS_TASK_PD_C2) [TYPE_C_PORT_2] = { .bus_type = EC_BUS_TYPE_I2C, diff --git a/board/adlrvpp_ite/board.h b/board/adlrvpp_ite/board.h index ea858da722..8552c5630f 100644 --- a/board/adlrvpp_ite/board.h +++ b/board/adlrvpp_ite/board.h @@ -69,8 +69,6 @@ #define I2C_PORT_TYPEC_1 IT83XX_I2C_CH_F #if defined(HAS_TASK_PD_C2) #define I2C_PORT_TYPEC_2 IT83XX_I2C_CH_E -#endif -#if defined(HAS_TASK_PD_C3) #define I2C_PORT_TYPEC_3 IT83XX_I2C_CH_D #endif diff --git a/board/adlrvpp_ite/gpio.inc b/board/adlrvpp_ite/gpio.inc index 9eb21524f3..877f5896c3 100644 --- a/board/adlrvpp_ite/gpio.inc +++ b/board/adlrvpp_ite/gpio.inc @@ -46,22 +46,29 @@ GPIO_INT(UART_SERVO_TX_EC_RX, PIN(B, 0), GPIO_INT_FALLING, uart_deepsleep_interr /* Using embedded TCPC for Port-0 */ UNIMPLEMENTED(USBC_TCPC_ALRT_P0) GPIO(NC_USBC_TCPC_ALRT_P0, PIN(I, 7), GPIO_INPUT) +GPIO_INT(USBC_TCPC_PPC_ALRT_P0, PIN(J, 5), GPIO_INT_BOTH, ppc_interrupt) + +#if defined(HAS_TASK_PD_C1) GPIO_INT(USBC_TCPC_ALRT_P1, PIN(G, 0), GPIO_INT_BOTH, tcpc_alert_event) -#if defined(BOARD_ADLRVPP_ITE) +GPIO_INT(USBC_TCPC_PPC_ALRT_P1, PIN(C, 4), GPIO_INT_BOTH, ppc_interrupt) +#else +GPIO(USBC_TCPC_ALRT_P1, PIN(G, 0), GPIO_INPUT) +GPIO(USBC_TCPC_PPC_ALRT_P1, PIN(C, 4), GPIO_INPUT) +#endif + +#if defined(HAS_TASK_PD_C2) GPIO_INT(USBC_TCPC_ALRT_P2, PIN(J, 1), GPIO_INT_BOTH, tcpc_alert_event) -GPIO_INT(USBC_TCPC_ALRT_P3, PIN(J, 3), GPIO_INT_BOTH, tcpc_alert_event) -#else /* BOARD_ADLRVPM_ITE */ +GPIO_INT(USBC_TCPC_PPC_ALRT_P2, PIN(E, 5), GPIO_INT_BOTH, ppc_interrupt) +#else GPIO(USBC_TCPC_ALRT_P2, PIN(J, 1), GPIO_INPUT) -GPIO(USBC_TCPC_ALRT_P3, PIN(J, 3), GPIO_INPUT) +GPIO(USBC_TCPC_PPC_ALRT_P2, PIN(E, 5), GPIO_INPUT) #endif -GPIO_INT(USBC_TCPC_PPC_ALRT_P0, PIN(J, 5), GPIO_INT_BOTH, ppc_interrupt) -GPIO_INT(USBC_TCPC_PPC_ALRT_P1, PIN(C, 4), GPIO_INT_BOTH, ppc_interrupt) -#if defined(BOARD_ADLRVPP_ITE) -GPIO_INT(USBC_TCPC_PPC_ALRT_P2, PIN(E, 5), GPIO_INT_BOTH, ppc_interrupt) +#if defined(HAS_TASK_PD_C3) +GPIO_INT(USBC_TCPC_ALRT_P3, PIN(J, 3), GPIO_INT_BOTH, tcpc_alert_event) GPIO_INT(USBC_TCPC_PPC_ALRT_P3, PIN(E, 6), GPIO_INT_BOTH, ppc_interrupt) -#else /* BOARD_ADLRVPM_ITE */ -GPIO(USBC_TCPC_PPC_ALRT_P2, PIN(E, 5), GPIO_INPUT) +#else +GPIO(USBC_TCPC_ALRT_P3, PIN(J, 3), GPIO_INPUT) GPIO(USBC_TCPC_PPC_ALRT_P3, PIN(E, 6), GPIO_INPUT) #endif -- cgit v1.2.1