From 5db1d264c15124001bb34e6742e609ea28765d39 Mon Sep 17 00:00:00 2001 From: Caveh Jalali Date: Mon, 1 Mar 2021 19:19:15 -0800 Subject: brya: Enable EC hibernate using PSL This adds the wake source pin definitions needed by the NPCX9 chip support code for brya board ID 1. Note that board ID 1 needs a rework on VCC1_RST to prevent it from falsely waking the board. BRANCH=none BUG=b:183246197 TEST=booted same image on old and new rev. of board Used "hibernate" on EC console hibernate the system. It woke up immediately (b/183412004) with cause "hibernate" indicating this was a PSL wake: --- UART initialized after reboot --- [Image: RO, brya_v2.0.8357-19a8f337db 2021-04-08 01:09:30 caveh@caveh] [Reset cause: power-on hibernate wake-pin] LID_OPEN was tested as a PSL wake source by artificially disabling CONFIG_HIBERNATE_PSL_VCC1_RST_WAKEUP to eliminate VCC1 as a false wake source. Change-Id: If4cca6d1e20ddc3c422697e6838c9df0ddd8cb15 Signed-off-by: Caveh Jalali Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2728679 Reviewed-by: Furquan Shaikh --- board/brya/board.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'board/brya') diff --git a/board/brya/board.h b/board/brya/board.h index 7f91c74551..e48ed173ac 100644 --- a/board/brya/board.h +++ b/board/brya/board.h @@ -17,9 +17,10 @@ #include "baseboard.h" /* - * Disable features enabled by default. + * This will happen automatically on NPCX9 ES2 and later. Do not remove + * until we can confirm all earlier chips are out of service. */ -#undef CONFIG_HIBERNATE +#define CONFIG_HIBERNATE_PSL_VCC1_RST_WAKEUP /* LED */ #define CONFIG_LED_PWM -- cgit v1.2.1