From 99591a03f7e9b3680d80e7cd040d7f437da1dfb1 Mon Sep 17 00:00:00 2001 From: Keith Short Date: Fri, 9 Aug 2019 13:57:59 -0600 Subject: hatch: SLP_S3/S4 sideband signals guarded with wrong config All the hatch platforms had a typo with the config option guarding the configuration of the SLP_S3_L and SLP_S4_L signals. Changed CONFIG_HOSTCMD_ESPI_VW_SIGNALS to CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS. BUG=b:139198212 BRANCH=none TEST=make buildall -j Change-Id: I96c01fb8e1903585f3bc19a30b2f9c0596e9edad Signed-off-by: Keith Short Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/1745655 Reviewed-by: Paul Fagerburg Reviewed-by: Tim Wawrzynczak --- board/kindred/board.h | 1 - board/kindred/gpio.inc | 2 +- 2 files changed, 1 insertion(+), 2 deletions(-) (limited to 'board/kindred') diff --git a/board/kindred/board.h b/board/kindred/board.h index e83a556751..e0d55dc666 100644 --- a/board/kindred/board.h +++ b/board/kindred/board.h @@ -21,7 +21,6 @@ #define CONFIG_LOW_POWER_IDLE #define CONFIG_HOSTCMD_ESPI -/* #define CONFIG_HOSTCMD_ESPI_VW_SIGNALS */ #undef CONFIG_UART_TX_BUF_SIZE #define CONFIG_UART_TX_BUF_SIZE 4096 diff --git a/board/kindred/gpio.inc b/board/kindred/gpio.inc index 2564c76888..aaa72fa91d 100644 --- a/board/kindred/gpio.inc +++ b/board/kindred/gpio.inc @@ -16,7 +16,7 @@ GPIO_INT(ACOK_OD, PIN(0, 0), GPIO_INT_BOTH | GPIO_HIB_WAKE_HIGH, ex /* Power sequencing interrupts */ GPIO_INT(SLP_S0_L, PIN(D, 5), GPIO_INT_BOTH, power_signal_interrupt) -#ifndef CONFIG_HOSTCMD_ESPI_VW_SIGNALS +#ifndef CONFIG_HOSTCMD_ESPI_VW_SLP_SIGNALS GPIO_INT(SLP_S3_L, PIN(A, 5), GPIO_INT_BOTH, power_signal_interrupt) GPIO_INT(SLP_S4_L, PIN(D, 4), GPIO_INT_BOTH, power_signal_interrupt) #endif -- cgit v1.2.1