From 44a4d92c3db539f14dd0003723f3a79040dc937a Mon Sep 17 00:00:00 2001 From: CHLin Date: Mon, 25 Jun 2018 17:24:36 +0800 Subject: npcx: uart: Add driver support for the second UART Nuvoton NPCX79nxB serie chips include two UART ports. In this CL, we add the driver support for these two UART modules. Develoers can select one of the UART ports as EC console by configuring "CONFIG_CONSOLE_UART" in board.h BRANCH=none BUG=none TEST=No build errors for make buildall. TEST="#define CONFIG_CONSOLE_UART 0"; build and flash image on npcx7 EVB; check EC console working via J21. TEST="#define CONFIG_CONSOLE_UART 1"; build and flash image on npcx7 EVB; check EC console working via J22. (Note: J16.3-J16.5 and JP6.2-JP6.3 must be connected together.) TEST=build images of board npcx_evb, poppy, and grunt, make sure EC console is functional on these boards. TEST=#define "CONFIG_CONSOLE_UART 0" and "CONFIG_UART_PAD_SWITCH" in board.h; build and flash image on npcx7_evb. check uart_alt_pad_read_write function still works by using the console command like: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/659460/1/board/poppy/board.c Change-Id: I7de91680e5d4f56c7cae66482c0953d8c324dbe7 Signed-off-by: CHLin Reviewed-on: https://chromium-review.googlesource.com/1113269 Commit-Ready: CH Lin Tested-by: CH Lin Reviewed-by: Randall Spangler --- board/npcx7_evb/board.h | 9 +++++++++ board/npcx7_evb/gpio.inc | 8 +++++++- 2 files changed, 16 insertions(+), 1 deletion(-) (limited to 'board/npcx7_evb') diff --git a/board/npcx7_evb/board.h b/board/npcx7_evb/board.h index bcc9437270..9080615006 100644 --- a/board/npcx7_evb/board.h +++ b/board/npcx7_evb/board.h @@ -74,6 +74,15 @@ #endif /* Optional feature to configure npcx7 chip */ + +/* Select which UART Controller is the Console UART */ +#undef CONFIG_CONSOLE_UART +#define CONFIG_CONSOLE_UART 0 /* 0:UART1 1:UART2 */ +/* + * This definition below actually doesn't define which UART controller to be + * used. Instead, it defines which pinouts (GPIO10/11 or GPIO64/65) are + * connected to "UART1" controller. + */ #if (BOARD_VERSION == 2) #define NPCX_UART_MODULE2 1 /* 1:GPIO64/65 as UART1 */ #else diff --git a/board/npcx7_evb/gpio.inc b/board/npcx7_evb/gpio.inc index 2acec02f09..e0bb9c1df8 100644 --- a/board/npcx7_evb/gpio.inc +++ b/board/npcx7_evb/gpio.inc @@ -52,12 +52,18 @@ GPIO(BOARD_VERSION2, PIN(6, 5), GPIO_INPUT) GPIO(BOARD_VERSION3, PIN(6, 6), GPIO_INPUT) /*********************** Alternate pins for npcx7 series **********************/ -/* UART Tx/Rx */ +#if (CONFIG_CONSOLE_UART == 0) +/* UART1 Tx/Rx */ #if NPCX_UART_MODULE2 ALTERNATE(PIN_MASK(6, 0x30), 1, MODULE_UART, 0) /* CR_SIN/SOUT GPIO64/65 */ #else ALTERNATE(PIN_MASK(1, 0x03), 1, MODULE_UART, 0) /* CR_SIN/SOUT GPIO10/11 */ #endif +#else +/* UART2 Tx/Rx */ +ALTERNATE(PIN_MASK(7, 0x20), 1, MODULE_UART, 0) /* CR_SIN2 GPIO75 */ +ALTERNATE(PIN_MASK(8, 0x40), 1, MODULE_UART, 0) /* CR_SOUT2 GPIO86 */ +#endif /* ADC */ ALTERNATE(PIN_MASK(4, 0x3E), 1, MODULE_ADC, 0) /* ADC0/1/2/3/4 GPIO45/44/43/42/41 */ -- cgit v1.2.1