From 55c1abf9ce1754cf93505400bf9b4c7c57eb03cb Mon Sep 17 00:00:00 2001 From: Yunlong Jia Date: Mon, 7 Jun 2021 04:19:27 +0000 Subject: pazquel: Initial EC image Create the initial EC image for the pazquel variant by copying the trogdor reference board EC files into a new directory named for the variant. (Auto-Generated by create_initial_ec_image.sh version 1.5.0). BUG=b:187232137 BRANCH=Trogdor TEST=make BOARD=pazquel Signed-off-by: Yunlong Jia Change-Id: Ic898116fc93a3ac51d50f34b24c13c33a452a25f Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2939856 Reviewed-by: Philip Chen Commit-Queue: Philip Chen --- board/pazquel/battery.c | 45 +++ board/pazquel/board.c | 621 +++++++++++++++++++++++++++++++++++++++++ board/pazquel/board.h | 101 +++++++ board/pazquel/build.mk | 14 + board/pazquel/ec.tasklist | 23 ++ board/pazquel/gpio.inc | 187 +++++++++++++ board/pazquel/led.c | 163 +++++++++++ board/pazquel/vif_override.xml | 3 + 8 files changed, 1157 insertions(+) create mode 100644 board/pazquel/battery.c create mode 100644 board/pazquel/board.c create mode 100644 board/pazquel/board.h create mode 100644 board/pazquel/build.mk create mode 100644 board/pazquel/ec.tasklist create mode 100644 board/pazquel/gpio.inc create mode 100644 board/pazquel/led.c create mode 100644 board/pazquel/vif_override.xml (limited to 'board/pazquel') diff --git a/board/pazquel/battery.c b/board/pazquel/battery.c new file mode 100644 index 0000000000..47bacd3c31 --- /dev/null +++ b/board/pazquel/battery.c @@ -0,0 +1,45 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Battery pack vendor provided charging profile + */ + +#include "battery.h" +#include "battery_smart.h" + +/* Shutdown mode parameter to write to manufacturer access register */ +#define SB_SHIP_MODE_REG SB_MANUFACTURER_ACCESS +#define SB_SHUTDOWN_DATA 0x0010 + +/* Battery info */ +static const struct battery_info info = { + .voltage_max = 8800, + .voltage_normal = 7700, + .voltage_min = 6000, + .precharge_current = 256, /* mA */ + .start_charging_min_c = 0, + .start_charging_max_c = 50, + .charging_min_c = 0, + .charging_max_c = 60, + .discharging_min_c = -20, + .discharging_max_c = 75, +}; + +const struct battery_info *battery_get_info(void) +{ + return &info; +} + +int board_cut_off_battery(void) +{ + int rv; + + /* Ship mode command must be sent twice to take effect */ + rv = sb_write(SB_SHIP_MODE_REG, SB_SHUTDOWN_DATA); + + if (rv != EC_SUCCESS) + return rv; + + return sb_write(SB_SHIP_MODE_REG, SB_SHUTDOWN_DATA); +} diff --git a/board/pazquel/board.c b/board/pazquel/board.c new file mode 100644 index 0000000000..7406d8cc2e --- /dev/null +++ b/board/pazquel/board.c @@ -0,0 +1,621 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Trogdor board-specific configuration */ + +#include "adc_chip.h" +#include "button.h" +#include "charge_manager.h" +#include "charge_state.h" +#include "extpower.h" +#include "driver/accel_bma2x2.h" +#include "driver/accelgyro_bmi_common.h" +#include "driver/ppc/sn5s330.h" +#include "driver/tcpm/ps8xxx.h" +#include "driver/tcpm/tcpci.h" +#include "gpio.h" +#include "hooks.h" +#include "keyboard_scan.h" +#include "lid_switch.h" +#include "pi3usb9201.h" +#include "power.h" +#include "power/qcom.h" +#include "power_button.h" +#include "pwm.h" +#include "pwm_chip.h" +#include "system.h" +#include "shi_chip.h" +#include "switch.h" +#include "tablet_mode.h" +#include "task.h" +#include "usbc_ocp.h" +#include "usbc_ppc.h" + +#define CPRINTS(format, args...) cprints(CC_USBCHARGE, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_USBCHARGE, format, ## args) + +/* Forward declaration */ +static void tcpc_alert_event(enum gpio_signal signal); +static void usb0_evt(enum gpio_signal signal); +static void usb1_evt(enum gpio_signal signal); +static void usba_oc_interrupt(enum gpio_signal signal); +static void ppc_interrupt(enum gpio_signal signal); +static void board_connect_c0_sbu(enum gpio_signal s); + +#include "gpio_list.h" + +/* GPIO Interrupt Handlers */ +static void tcpc_alert_event(enum gpio_signal signal) +{ + int port = -1; + + switch (signal) { + case GPIO_USB_C0_PD_INT_ODL: + port = 0; + break; + case GPIO_USB_C1_PD_INT_ODL: + port = 1; + break; + default: + return; + } + + schedule_deferred_pd_interrupt(port); +} + +static void usb0_evt(enum gpio_signal signal) +{ + task_set_event(TASK_ID_USB_CHG_P0, USB_CHG_EVENT_BC12); +} + +static void usb1_evt(enum gpio_signal signal) +{ + task_set_event(TASK_ID_USB_CHG_P1, USB_CHG_EVENT_BC12); +} + +static void usba_oc_deferred(void) +{ + /* Use next number after all USB-C ports to indicate the USB-A port */ + board_overcurrent_event(CONFIG_USB_PD_PORT_MAX_COUNT, + !gpio_get_level(GPIO_USB_A0_OC_ODL)); +} +DECLARE_DEFERRED(usba_oc_deferred); + +static void usba_oc_interrupt(enum gpio_signal signal) +{ + hook_call_deferred(&usba_oc_deferred_data, 0); +} + +static void ppc_interrupt(enum gpio_signal signal) +{ + switch (signal) { + case GPIO_USB_C0_SWCTL_INT_ODL: + sn5s330_interrupt(0); + break; + case GPIO_USB_C1_SWCTL_INT_ODL: + sn5s330_interrupt(1); + break; + default: + break; + } +} + +static void board_connect_c0_sbu_deferred(void) +{ + /* + * If CCD_MODE_ODL asserts, it means there's a debug accessory connected + * and we should enable the SBU FETs. + */ + ppc_set_sbu(0, 1); +} +DECLARE_DEFERRED(board_connect_c0_sbu_deferred); + +static void board_connect_c0_sbu(enum gpio_signal s) +{ + hook_call_deferred(&board_connect_c0_sbu_deferred_data, 0); +} + +/* Keyboard scan setting */ +struct keyboard_scan_config keyscan_config = { + /* Use 80 us, because KSO_02 passes through the H1. */ + .output_settle_us = 80, + /* + * Unmask 0x08 in [0] (KSO_00/KSI_03, the new location of Search key); + * as it still uses the legacy location (KSO_01/KSI_00). + */ + .actual_key_mask = { + 0x14, 0xff, 0xff, 0xff, 0xff, 0xf5, 0xff, + 0xa4, 0xff, 0xfe, 0x55, 0xfa, 0xca + }, + /* Other values should be the same as the default configuration. */ + .debounce_down_us = 9 * MSEC, + .debounce_up_us = 30 * MSEC, + .scan_period_us = 3 * MSEC, + .min_post_scan_delay_us = 1000, + .poll_timeout_us = 100 * MSEC, +}; + +/* I2C port map */ +const struct i2c_port_t i2c_ports[] = { + {"power", I2C_PORT_POWER, 100, GPIO_EC_I2C_POWER_SCL, + GPIO_EC_I2C_POWER_SDA}, + {"tcpc0", I2C_PORT_TCPC0, 1000, GPIO_EC_I2C_USB_C0_PD_SCL, + GPIO_EC_I2C_USB_C0_PD_SDA}, + {"tcpc1", I2C_PORT_TCPC1, 1000, GPIO_EC_I2C_USB_C1_PD_SCL, + GPIO_EC_I2C_USB_C1_PD_SDA}, + {"eeprom", I2C_PORT_EEPROM, 400, GPIO_EC_I2C_EEPROM_SCL, + GPIO_EC_I2C_EEPROM_SDA}, + {"sensor", I2C_PORT_SENSOR, 400, GPIO_EC_I2C_SENSOR_SCL, + GPIO_EC_I2C_SENSOR_SDA}, +}; + +const unsigned int i2c_ports_used = ARRAY_SIZE(i2c_ports); + +/* ADC channels */ +const struct adc_t adc_channels[] = { + /* Measure VBUS through a 1/10 voltage divider */ + [ADC_VBUS] = { + "VBUS", + NPCX_ADC_CH1, + ADC_MAX_VOLT * 10, + ADC_READ_MAX + 1, + 0 + }, + /* + * Adapter current output or battery charging/discharging current (uV) + * 18x amplification on charger side. + */ + [ADC_AMON_BMON] = { + "AMON_BMON", + NPCX_ADC_CH2, + ADC_MAX_VOLT * 1000 / 18, + ADC_READ_MAX + 1, + 0 + }, + /* + * ISL9238 PSYS output is 1.44 uA/W over 5.6K resistor, to read + * 0.8V @ 99 W, i.e. 124000 uW/mV. Using ADC_MAX_VOLT*124000 and + * ADC_READ_MAX+1 as multiplier/divider leads to overflows, so we + * only divide by 2 (enough to avoid precision issues). + */ + [ADC_PSYS] = { + "PSYS", + NPCX_ADC_CH3, + ADC_MAX_VOLT * 124000 * 2 / (ADC_READ_MAX + 1), + 2, + 0 + }, +}; +BUILD_ASSERT(ARRAY_SIZE(adc_channels) == ADC_CH_COUNT); + +const struct pwm_t pwm_channels[] = { + [PWM_CH_KBLIGHT] = { .channel = 3, .flags = 0, .freq = 10000 }, + /* TODO(waihong): Assign a proper frequency. */ + [PWM_CH_DISPLIGHT] = { .channel = 5, .flags = 0, .freq = 4800 }, +}; +BUILD_ASSERT(ARRAY_SIZE(pwm_channels) == PWM_CH_COUNT); + +/* Power Path Controller */ +struct ppc_config_t ppc_chips[] = { + { + .i2c_port = I2C_PORT_TCPC0, + .i2c_addr_flags = SN5S330_ADDR0_FLAGS, + .drv = &sn5s330_drv + }, + { + .i2c_port = I2C_PORT_TCPC1, + .i2c_addr_flags = SN5S330_ADDR0_FLAGS, + .drv = &sn5s330_drv + }, +}; +unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips); + +/* TCPC mux configuration */ +const struct tcpc_config_t tcpc_config[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_TCPC0, + .addr_flags = PS8751_I2C_ADDR1_FLAGS, + }, + .drv = &ps8xxx_tcpm_drv, + }, + { + .bus_type = EC_BUS_TYPE_I2C, + .i2c_info = { + .port = I2C_PORT_TCPC1, + .addr_flags = PS8751_I2C_ADDR1_FLAGS, + }, + .drv = &ps8xxx_tcpm_drv, + }, +}; + +/* + * Port-0/1 USB mux driver. + * + * The USB mux is handled by TCPC chip and the HPD update is through a GPIO + * to AP. But the TCPC chip is also needed to know the HPD status; otherwise, + * the mux misbehaves. + */ +const struct usb_mux usb_muxes[CONFIG_USB_PD_PORT_MAX_COUNT] = { + { + .usb_port = 0, + .driver = &tcpci_tcpm_usb_mux_driver, + .hpd_update = &ps8xxx_tcpc_update_hpd_status, + }, + { + .usb_port = 1, + .driver = &tcpci_tcpm_usb_mux_driver, + .hpd_update = &ps8xxx_tcpc_update_hpd_status, + } +}; + +const int usb_port_enable[USB_PORT_COUNT] = { + GPIO_EN_USB_A_5V, +}; + +/* BC1.2 */ +const struct pi3usb9201_config_t pi3usb9201_bc12_chips[] = { + { + .i2c_port = I2C_PORT_POWER, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + }, + { + .i2c_port = I2C_PORT_EEPROM, + .i2c_addr_flags = PI3USB9201_I2C_ADDR_3_FLAGS, + }, +}; + +/* Initialize board. */ +static void board_init(void) +{ + /* Enable BC1.2 interrupts */ + gpio_enable_interrupt(GPIO_USB_C0_BC12_INT_L); + gpio_enable_interrupt(GPIO_USB_C1_BC12_INT_L); + + /* Enable USB-A overcurrent interrupt */ + gpio_enable_interrupt(GPIO_USB_A0_OC_ODL); + + /* Enable interrupt for BMI160 sensor */ + gpio_enable_interrupt(GPIO_ACCEL_GYRO_INT_L); + + /* + * The H1 SBU line for CCD are behind PPC chip. The PPC internal FETs + * for SBU may be disconnected after DP alt mode is off. Should enable + * the CCD_MODE_ODL interrupt to make sure the SBU FETs are connected. + */ + gpio_enable_interrupt(GPIO_CCD_MODE_ODL); + + /* Set the backlight duty cycle to 0. AP will override it later. */ + pwm_set_duty(PWM_CH_DISPLIGHT, 0); +} +DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT); + +void board_tcpc_init(void) +{ + /* Only reset TCPC if not sysjump */ + if (!system_jumped_late()) { + /* TODO(crosbug.com/p/61098): How long do we need to wait? */ + board_reset_pd_mcu(); + } + + /* Enable PPC interrupts */ + gpio_enable_interrupt(GPIO_USB_C0_SWCTL_INT_ODL); + + /* Enable TCPC interrupts */ + gpio_enable_interrupt(GPIO_USB_C0_PD_INT_ODL); + gpio_enable_interrupt(GPIO_USB_C1_PD_INT_ODL); + + /* + * Initialize HPD to low; after sysjump SOC needs to see + * HPD pulse to enable video path + */ + for (int port = 0; port < CONFIG_USB_PD_PORT_MAX_COUNT; ++port) + usb_mux_hpd_update(port, 0, 0); +} +DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_I2C+1); + +void board_hibernate(void) +{ + int i; + + /* + * Sensors are unpowered in hibernate. Apply PD to the + * interrupt lines such that they don't float. + */ + gpio_set_flags(GPIO_ACCEL_GYRO_INT_L, + GPIO_INPUT | GPIO_PULL_DOWN); + gpio_set_flags(GPIO_LID_ACCEL_INT_L, + GPIO_INPUT | GPIO_PULL_DOWN); + + /* + * Enable the PPC power sink path before EC enters hibernate; + * otherwise, ACOK won't go High and can't wake EC up. Check the + * bug b/170324206 for details. + */ + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) + ppc_vbus_sink_enable(i, 1); +} + +/* Called on AP S0 -> S3 transition */ +static void board_chipset_suspend(void) +{ + /* + * Turn off display backlight in S3. AP has its own control. The EC's + * and the AP's will be AND'ed together in hardware. + */ + gpio_set_level(GPIO_ENABLE_BACKLIGHT, 0); + pwm_enable(PWM_CH_DISPLIGHT, 0); +} +DECLARE_HOOK(HOOK_CHIPSET_SUSPEND, board_chipset_suspend, HOOK_PRIO_DEFAULT); + +/* Called on AP S3 -> S0 transition */ +static void board_chipset_resume(void) +{ + /* Turn on display and keyboard backlight in S0. */ + gpio_set_level(GPIO_ENABLE_BACKLIGHT, 1); + if (pwm_get_duty(PWM_CH_DISPLIGHT)) + pwm_enable(PWM_CH_DISPLIGHT, 1); +} +DECLARE_HOOK(HOOK_CHIPSET_RESUME, board_chipset_resume, HOOK_PRIO_DEFAULT); + +void board_set_switchcap_power(int enable) +{ + gpio_set_level(GPIO_SWITCHCAP_ON, enable); +} + +int board_is_switchcap_enabled(void) +{ + return gpio_get_level(GPIO_SWITCHCAP_ON); +} + +int board_is_switchcap_power_good(void) +{ + return gpio_get_level(GPIO_SWITCHCAP_PG); +} + +void board_reset_pd_mcu(void) +{ + cprints(CC_USB, "Resetting TCPCs..."); + cflush(); + + gpio_set_level(GPIO_USB_C0_PD_RST_L, 0); + gpio_set_level(GPIO_USB_C1_PD_RST_L, 0); + msleep(PS8XXX_RESET_DELAY_MS); + gpio_set_level(GPIO_USB_C0_PD_RST_L, 1); + gpio_set_level(GPIO_USB_C1_PD_RST_L, 1); + msleep(PS8805_FW_INIT_DELAY_MS); +} + +void board_set_tcpc_power_mode(int port, int mode) +{ + /* Ignore the "mode" to turn the chip on. We can only do a reset. */ + if (mode) + return; + + board_reset_pd_mcu(); +} + +int board_vbus_sink_enable(int port, int enable) +{ + /* Both ports are controlled by PPC SN5S330 */ + return ppc_vbus_sink_enable(port, enable); +} + +int board_is_sourcing_vbus(int port) +{ + /* Both ports are controlled by PPC SN5S330 */ + return ppc_is_sourcing_vbus(port); +} + +void board_overcurrent_event(int port, int is_overcurrented) +{ + /* TODO(b/120231371): Notify AP */ + CPRINTS("p%d: overcurrent!", port); +} + +int board_set_active_charge_port(int port) +{ + int is_real_port = (port >= 0 && + port < CONFIG_USB_PD_PORT_MAX_COUNT); + int i; + + if (!is_real_port && port != CHARGE_PORT_NONE) + return EC_ERROR_INVAL; + + if (port == CHARGE_PORT_NONE) { + CPRINTS("Disabling all charging port"); + + /* Disable all ports. */ + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + /* + * Do not return early if one fails otherwise we can + * get into a boot loop assertion failure. + */ + if (board_vbus_sink_enable(i, 0)) + CPRINTS("Disabling p%d sink path failed.", i); + } + + return EC_SUCCESS; + } + + /* Check if the port is sourcing VBUS. */ + if (board_is_sourcing_vbus(port)) { + CPRINTS("Skip enable p%d", port); + return EC_ERROR_INVAL; + } + + + CPRINTS("New charge port: p%d", port); + + /* + * Turn off the other ports' sink path FETs, before enabling the + * requested charge port. + */ + for (i = 0; i < CONFIG_USB_PD_PORT_MAX_COUNT; i++) { + if (i == port) + continue; + + if (board_vbus_sink_enable(i, 0)) + CPRINTS("p%d: sink path disable failed.", i); + } + + /* Enable requested charge port. */ + if (board_vbus_sink_enable(port, 1)) { + CPRINTS("p%d: sink path enable failed.", port); + return EC_ERROR_UNKNOWN; + } + + return EC_SUCCESS; +} + +void board_set_charge_limit(int port, int supplier, int charge_ma, + int max_ma, int charge_mv) +{ + /* + * Ignore lower charge ceiling on PD transition if our battery is + * critical, as we may brownout. + */ + if (supplier == CHARGE_SUPPLIER_PD && + charge_ma < 1500 && + charge_get_percent() < CONFIG_CHARGER_MIN_BAT_PCT_FOR_POWER_ON) { + CPRINTS("Using max ilim %d", max_ma); + charge_ma = max_ma; + } + + charge_set_input_current_limit(MAX(charge_ma, + CONFIG_CHARGER_INPUT_CURRENT), + charge_mv); +} + +uint16_t tcpc_get_alert_status(void) +{ + uint16_t status = 0; + + if (!gpio_get_level(GPIO_USB_C0_PD_INT_ODL)) + if (gpio_get_level(GPIO_USB_C0_PD_RST_L)) + status |= PD_STATUS_TCPC_ALERT_0; + if (!gpio_get_level(GPIO_USB_C1_PD_INT_ODL)) + if (gpio_get_level(GPIO_USB_C1_PD_RST_L)) + status |= PD_STATUS_TCPC_ALERT_1; + + return status; +} + +/* Mutexes */ +static struct mutex g_base_mutex; +static struct mutex g_lid_mutex; + +static struct bmi_drv_data_t g_bmi160_data; +static struct accelgyro_saved_data_t g_bma255_data; + +/* Matrix to rotate accelerometer into standard reference frame */ +const mat33_fp_t base_standard_ref = { + { FLOAT_TO_FP(1), 0, 0}, + { 0, FLOAT_TO_FP(-1), 0}, + { 0, 0, FLOAT_TO_FP(-1)} +}; + +static const mat33_fp_t lid_standard_ref = { + { 0, FLOAT_TO_FP(1), 0}, + { FLOAT_TO_FP(-1), 0, 0}, + { 0, 0, FLOAT_TO_FP(1)} +}; + +struct motion_sensor_t motion_sensors[] = { + [LID_ACCEL] = { + .name = "Lid Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMA255, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_LID, + .drv = &bma2x2_accel_drv, + .mutex = &g_lid_mutex, + .drv_data = &g_bma255_data, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = BMA2x2_I2C_ADDR1_FLAGS, + .rot_standard_ref = &lid_standard_ref, + .default_range = 2, /* g, to support lid angle calculation. */ + .min_frequency = BMA255_ACCEL_MIN_FREQ, + .max_frequency = BMA255_ACCEL_MAX_FREQ, + .config = { + /* EC use accel for angle detection */ + [SENSOR_CONFIG_EC_S0] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + /* Sensor on for lid angle detection */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + }, + }, + /* + * Note: bmi160: supports accelerometer and gyro sensor + * Requirement: accelerometer sensor must init before gyro sensor + * DO NOT change the order of the following table. + */ + [BASE_ACCEL] = { + .name = "Base Accel", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMI160, + .type = MOTIONSENSE_TYPE_ACCEL, + .location = MOTIONSENSE_LOC_BASE, + .drv = &bmi160_drv, + .mutex = &g_base_mutex, + .drv_data = &g_bmi160_data, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS, + .rot_standard_ref = &base_standard_ref, + .default_range = 4, /* g, to meet CDD 7.3.1/C-1-4 reqs */ + .min_frequency = BMI_ACCEL_MIN_FREQ, + .max_frequency = BMI_ACCEL_MAX_FREQ, + .config = { + [SENSOR_CONFIG_EC_S0] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + /* Sensor on for lid angle detection */ + [SENSOR_CONFIG_EC_S3] = { + .odr = 10000 | ROUND_UP_FLAG, + }, + }, + }, + [BASE_GYRO] = { + .name = "Gyro", + .active_mask = SENSOR_ACTIVE_S0_S3, + .chip = MOTIONSENSE_CHIP_BMI160, + .type = MOTIONSENSE_TYPE_GYRO, + .location = MOTIONSENSE_LOC_BASE, + .drv = &bmi160_drv, + .mutex = &g_base_mutex, + .drv_data = &g_bmi160_data, + .port = I2C_PORT_SENSOR, + .i2c_spi_addr_flags = BMI160_ADDR0_FLAGS, + .default_range = 1000, /* dps */ + .rot_standard_ref = &base_standard_ref, + .min_frequency = BMI_GYRO_MIN_FREQ, + .max_frequency = BMI_GYRO_MAX_FREQ, + }, +}; +const unsigned int motion_sensor_count = ARRAY_SIZE(motion_sensors); + +#ifndef TEST_BUILD +/* This callback disables keyboard when convertibles are fully open */ +void lid_angle_peripheral_enable(int enable) +{ + int chipset_in_s0 = chipset_in_state(CHIPSET_STATE_ON); + + if (enable) { + keyboard_scan_enable(1, KB_SCAN_DISABLE_LID_ANGLE); + } else { + /* + * Ensure that the chipset is off before disabling the keyboard. + * When the chipset is on, the EC keeps the keyboard enabled and + * the AP decides whether to ignore input devices or not. + */ + if (!chipset_in_s0) + keyboard_scan_enable(0, KB_SCAN_DISABLE_LID_ANGLE); + } +} +#endif diff --git a/board/pazquel/board.h b/board/pazquel/board.h new file mode 100644 index 0000000000..08a8f161f1 --- /dev/null +++ b/board/pazquel/board.h @@ -0,0 +1,101 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Trogdor board configuration */ + +#ifndef __CROS_EC_BOARD_H +#define __CROS_EC_BOARD_H + +#include "baseboard.h" + +/* TODO(waihong): Remove the following bringup features */ +#define CONFIG_BRINGUP +#define CONFIG_SYSTEM_UNLOCKED /* Allow dangerous commands. */ +#define CONFIG_USB_PD_DEBUG_LEVEL 3 +#define CONFIG_CMD_GPIO_EXTENDED +#define CONFIG_CMD_POWERINDEBUG +#define CONFIG_I2C_DEBUG + +/* Internal SPI flash on NPCX7 */ +#define CONFIG_FLASH_SIZE_BYTES (512 * 1024) /* 512KB internal spi flash */ + +/* Keyboard */ +#define CONFIG_KEYBOARD_PROTOCOL_MKBP +#define CONFIG_KEYBOARD_BOARD_CONFIG +#define CONFIG_PWM_KBLIGHT + +/* BC 1.2 Charger */ +#define CONFIG_BC12_DETECT_PI3USB9201 + +/* USB */ +#define CONFIG_USB_PD_TCPM_PS8805 +#define CONFIG_USBC_PPC_SN5S330 +#define CONFIG_USB_PD_PORT_MAX_COUNT 2 + +/* USB-A */ +#define USB_PORT_COUNT 1 +#define CONFIG_USB_PORT_POWER_DUMB + +/* Sensors */ +/* BMI160 Base accel/gyro */ +#define CONFIG_ACCELGYRO_BMI160 +#define CONFIG_ACCEL_INTERRUPTS +#define CONFIG_ACCELGYRO_BMI160_INT_EVENT \ + TASK_EVENT_MOTION_SENSOR_INTERRUPT(BASE_ACCEL) +#define OPT3001_I2C_ADDR_FLAGS OPT3001_I2C_ADDR1_FLAGS + +/* BMA253 lid accel */ +#define CONFIG_ACCEL_BMA255 +#define CONFIG_ACCEL_FORCE_MODE_MASK BIT(LID_ACCEL) + +#define CONFIG_LID_ANGLE +#define CONFIG_LID_ANGLE_SENSOR_BASE BASE_ACCEL +#define CONFIG_LID_ANGLE_SENSOR_LID LID_ACCEL +#define CONFIG_LID_ANGLE_UPDATE + +#define CONFIG_TABLET_MODE +#define CONFIG_TABLET_MODE_SWITCH +#define CONFIG_GMR_TABLET_MODE +#define GMR_TABLET_MODE_GPIO_L GPIO_TABLET_MODE_L + +/* GPIO alias */ +#define GPIO_AC_PRESENT GPIO_ACOK_OD +#define GPIO_WP_L GPIO_EC_WP_ODL +#define GPIO_SWITCHCAP_PG GPIO_SWITCHCAP_GPIO_1 +#define GPIO_ACOK_OD GPIO_CHG_ACOK_OD + +#ifndef __ASSEMBLER__ + +#include "gpio_signal.h" +#include "registers.h" + +enum adc_channel { + ADC_VBUS, + ADC_AMON_BMON, + ADC_PSYS, + ADC_CH_COUNT +}; + +/* Motion sensors */ +enum sensor_id { + LID_ACCEL = 0, + BASE_ACCEL, + BASE_GYRO, + SENSOR_COUNT, +}; + +enum pwm_channel { + PWM_CH_KBLIGHT = 0, + PWM_CH_DISPLIGHT, + PWM_CH_COUNT +}; + +/* Reset all TCPCs. */ +void board_reset_pd_mcu(void); +void board_set_tcpc_power_mode(int port, int mode); + +#endif /* !defined(__ASSEMBLER__) */ + +#endif /* __CROS_EC_BOARD_H */ diff --git a/board/pazquel/build.mk b/board/pazquel/build.mk new file mode 100644 index 0000000000..03af857424 --- /dev/null +++ b/board/pazquel/build.mk @@ -0,0 +1,14 @@ +# -*- makefile -*- +# Copyright 2021 The Chromium OS Authors. All rights reserved. +# Use of this source code is governed by a BSD-style license that can be +# found in the LICENSE file. +# +# Board specific files build +# + +CHIP:=npcx +CHIP_FAMILY:=npcx7 +CHIP_VARIANT:=npcx7m6fc +BASEBOARD:=trogdor + +board-y=battery.o board.o led.o diff --git a/board/pazquel/ec.tasklist b/board/pazquel/ec.tasklist new file mode 100644 index 0000000000..5beeb38feb --- /dev/null +++ b/board/pazquel/ec.tasklist @@ -0,0 +1,23 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* + * See CONFIG_TASK_LIST in config.h for details. + */ + +#define CONFIG_TASK_LIST \ + TASK_ALWAYS(HOOKS, hook_task, NULL, ULTRA_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P0, usb_charger_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_ALWAYS(USB_CHG_P1, usb_charger_task, NULL, LARGER_TASK_STACK_SIZE) \ + TASK_NOTEST(CHIPSET, chipset_task, NULL, ULTRA_TASK_STACK_SIZE) \ + TASK_ALWAYS(CHARGER, charger_task, NULL, ULTRA_TASK_STACK_SIZE) \ + TASK_ALWAYS(MOTIONSENSE, motion_sense_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(HOSTCMD, host_command_task, NULL, ULTRA_TASK_STACK_SIZE) \ + TASK_ALWAYS(CONSOLE, console_task, NULL, ULTRA_TASK_STACK_SIZE) \ + TASK_NOTEST(KEYSCAN, keyboard_scan_task, NULL, VENTI_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C0, pd_task, NULL, ULTRA_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_C1, pd_task, NULL, ULTRA_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C0, pd_interrupt_handler_task, 0, ULTRA_TASK_STACK_SIZE) \ + TASK_ALWAYS(PD_INT_C1, pd_interrupt_handler_task, 1, ULTRA_TASK_STACK_SIZE) diff --git a/board/pazquel/gpio.inc b/board/pazquel/gpio.inc new file mode 100644 index 0000000000..0d7e73fca2 --- /dev/null +++ b/board/pazquel/gpio.inc @@ -0,0 +1,187 @@ +/* -*- mode:c -*- + * + * Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/* Declare symbolic names for all the GPIOs that we care about. + * Note: Those with interrupt handlers must be declared first. */ + +/* USB interrupts */ +GPIO_INT(USB_C0_PD_INT_ODL, PIN(E, 0), GPIO_INT_FALLING, tcpc_alert_event) /* Interrupt from port-0 TCPC */ +GPIO_INT(USB_C1_PD_INT_ODL, PIN(F, 5), GPIO_INT_FALLING, tcpc_alert_event) /* Interrupt from port-1 TCPC */ +GPIO_INT(USB_C0_SWCTL_INT_ODL, PIN(0, 3), GPIO_INT_FALLING, ppc_interrupt) /* Interrupt from port-0 PPC */ +GPIO_INT(USB_C1_SWCTL_INT_ODL, PIN(4, 0), GPIO_INT_FALLING, ppc_interrupt) /* Interrupt from port-1 PPC */ +GPIO_INT(USB_C0_BC12_INT_L, PIN(6, 1), GPIO_INT_FALLING, usb0_evt) /* Interrupt from port-0 BC1.2 */ +GPIO_INT(USB_C1_BC12_INT_L, PIN(8, 2), GPIO_INT_FALLING, usb1_evt) /* Interrupt from port-1 BC1.2 */ +GPIO_INT(USB_A0_OC_ODL, PIN(D, 1), GPIO_INT_BOTH | GPIO_PULL_UP, usba_oc_interrupt) + +/* System interrupts */ +GPIO_INT(CHG_ACOK_OD, PIN(0, 0), GPIO_INT_BOTH, extpower_interrupt) /* ACOK */ +GPIO_INT(CCD_MODE_ODL, PIN(E, 3), GPIO_INT_FALLING, board_connect_c0_sbu) /* Case Closed Debug Mode */ +GPIO_INT(EC_PWR_BTN_ODL, PIN(0, 1), GPIO_INT_BOTH, power_button_interrupt) /* Power button */ +GPIO_INT(EC_VOLDN_BTN_ODL, PIN(7, 0), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) /* Volume Up button */ +GPIO_INT(EC_VOLUP_BTN_ODL, PIN(F, 2), GPIO_INT_BOTH | GPIO_PULL_UP, button_interrupt) /* Volume Down button */ +GPIO_INT(EC_WP_ODL, PIN(A, 1), GPIO_INT_BOTH, switch_interrupt) /* Write protection */ +GPIO_INT(LID_OPEN_EC, PIN(D, 2), GPIO_INT_BOTH, lid_interrupt) /* Lid open */ +GPIO_INT(AP_RST_L, PIN(C, 1), GPIO_INT_BOTH | GPIO_SEL_1P8V, chipset_ap_rst_interrupt) /* PMIC to signal AP reset */ +GPIO_INT(PS_HOLD, PIN(A, 4), GPIO_INT_BOTH | GPIO_PULL_DOWN, power_signal_interrupt) /* Indicate when AP triggers reset/shutdown */ +GPIO_INT(AP_SUSPEND, PIN(5, 7), GPIO_INT_BOTH, power_signal_interrupt) /* Suspend signal from PMIC */ +GPIO_INT(DEPRECATED_AP_RST_REQ, PIN(C, 2), GPIO_INT_BOTH | GPIO_PULL_DOWN | GPIO_SEL_1P8V, power_signal_interrupt) /* Deprecated AP initiated reset indicator */ +/* + * When switch-cap is off, the POWER_GOOD signal is floating. Need a pull-down + * to make it low. Overload the interrupt function chipset_warm_reset_interrupt + * for not only signalling power_signal_interrupt but also handling the logic + * of WARM_RESET_L which is pulled-up by the same rail of POWER_GOOD. + */ +GPIO_INT(POWER_GOOD, PIN(5, 4), GPIO_INT_BOTH | GPIO_PULL_DOWN, chipset_power_good_interrupt) /* SRC_PP1800_S10A from PMIC */ +GPIO_INT(WARM_RESET_L, PIN(F, 4), GPIO_INT_BOTH | GPIO_SEL_1P8V, chipset_warm_reset_interrupt) /* AP warm reset */ +GPIO_INT(AP_EC_SPI_CS_L, PIN(5, 3), GPIO_INT_FALLING | GPIO_PULL_DOWN, shi_cs_event) /* EC SPI Chip Select */ + +/* Sensor interrupts */ +GPIO_INT(TABLET_MODE_L, PIN(C, 6), GPIO_INT_BOTH, gmr_tablet_switch_isr) +GPIO_INT(ACCEL_GYRO_INT_L, PIN(A, 0), GPIO_INT_FALLING, bmi160_interrupt) /* Accelerometer/gyro interrupt */ + +/* + * EC_RST_ODL used to be a wake source from PSL mode. However, we disabled + * the PSL mode. This GPIO does nothing now. Simply set it an INPUT. + */ +GPIO(EC_RST_ODL, PIN(0, 2), GPIO_INPUT) /* EC reset */ +GPIO(EC_ENTERING_RW, PIN(E, 1), GPIO_OUT_LOW) /* Indicate when EC is entering RW code */ +GPIO(EC_BATT_PRES_ODL, PIN(E, 5), GPIO_INPUT) /* Battery Present */ + +/* PMIC/AP 1.8V */ +GPIO(PMIC_RESIN_L, PIN(3, 2), GPIO_ODR_HIGH) /* PMIC reset trigger */ +GPIO(PMIC_KPD_PWR_ODL, PIN(D, 6), GPIO_ODR_HIGH) /* PMIC power button */ +GPIO(EC_INT_L, PIN(A, 2), GPIO_ODR_HIGH) /* Interrupt line between AP and EC */ + +/* Power enables */ +GPIO(HIBERNATE_L, PIN(5, 2), GPIO_OUT_HIGH) /* EC hibernate */ +GPIO(SWITCHCAP_ON, PIN(D, 5), GPIO_OUT_LOW) /* Enable switch cap */ +GPIO(EN_PP3300_A, PIN(A, 6), GPIO_OUT_LOW) /* Enable PP3300 */ +GPIO(EN_PP5000_A, PIN(6, 7), GPIO_OUT_LOW) /* Enable PP5000 */ +GPIO(EC_BL_DISABLE_L, PIN(B, 6), GPIO_OUT_LOW) /* Backlight disable signal from EC */ + +/* Sensors */ +GPIO(LID_ACCEL_INT_L, PIN(5, 6), GPIO_INPUT) /* Lid accel sensor interrupt */ +/* Control the gate for trackpad IRQ. High closes the gate. + * This is always set low so that the OS can manage the trackpad. */ +GPIO(TRACKPAD_INT_GATE, PIN(7, 4), GPIO_OUT_LOW) + +/* USB-C */ +GPIO(USB_C0_PD_RST_L, PIN(F, 1), GPIO_OUT_HIGH) /* Port-0 TCPC chip reset */ +GPIO(USB_C1_PD_RST_L, PIN(E, 4), GPIO_OUT_HIGH) /* Port-1 TCPC chip reset */ +GPIO(DP_MUX_OE_L, PIN(9, 6), GPIO_ODR_HIGH) /* DP mux enable, actually Open-Drain */ +GPIO(DP_MUX_SEL, PIN(4, 5), GPIO_OUT_LOW) /* DP mux selection: L:C0, H:C1 */ +GPIO(DP_HOT_PLUG_DET, PIN(9, 5), GPIO_OUT_LOW) /* DP HPD to AP */ + +/* USB-A */ +GPIO(EN_USB_A_5V, PIN(8, 6), GPIO_OUT_LOW) +GPIO(USB_A_CDP_ILIM_EN_L, PIN(7, 5), GPIO_OUT_HIGH) /* H:CDP, L:SDP. Only one USB-A port, always CDP */ + +/* LEDs */ +GPIO(EC_CHG_LED_Y_C0, PIN(6, 0), GPIO_OUT_LOW) +GPIO(EC_CHG_LED_W_C0, PIN(C, 0), GPIO_OUT_LOW) +GPIO(EC_CHG_LED_Y_C1, PIN(C, 3), GPIO_OUT_LOW) +GPIO(EC_CHG_LED_W_C1, PIN(C, 4), GPIO_OUT_LOW) + +/* + * SPI host interface - enable PDs by default. These will be made functional + * by the SHI driver when the AP powers up, and restored back to GPIO when + * the AP powers down. + */ +GPIO(AP_EC_SPI_MOSI, PIN(4, 6), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(AP_EC_SPI_MISO, PIN(4, 7), GPIO_INPUT | GPIO_PULL_DOWN) +GPIO(AP_EC_SPI_CLK, PIN(5, 5), GPIO_INPUT | GPIO_PULL_DOWN) + +/* PWM */ +GPIO(KB_BL_PWM, PIN(8, 0), GPIO_INPUT) /* PWM3 */ +GPIO(EDP_BKLTCTL, PIN(B, 7), GPIO_INPUT) /* PWM5 */ + +/* ADC */ +GPIO(PPVAR_BOOSTIN_SENSE, PIN(4, 4), GPIO_INPUT) /* ADC1 */ +GPIO(CHARGER_IADP, PIN(4, 3), GPIO_INPUT) /* ADC2 */ +GPIO(CHARGER_PMON, PIN(4, 2), GPIO_INPUT) /* ADC3 */ + +/* I2C */ +GPIO(EC_I2C_POWER_SCL, PIN(B, 5), GPIO_INPUT) +GPIO(EC_I2C_POWER_SDA, PIN(B, 4), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_PD_SCL, PIN(9, 0), GPIO_INPUT) +GPIO(EC_I2C_USB_C0_PD_SDA, PIN(8, 7), GPIO_INPUT) +GPIO(EC_I2C_USB_C1_PD_SCL, PIN(9, 2), GPIO_INPUT) +GPIO(EC_I2C_USB_C1_PD_SDA, PIN(9, 1), GPIO_INPUT) +GPIO(EC_I2C_EEPROM_SCL, PIN(3, 3), GPIO_INPUT) +GPIO(EC_I2C_EEPROM_SDA, PIN(3, 6), GPIO_INPUT) +GPIO(EC_I2C_SENSOR_SCL, PIN(B, 3), GPIO_INPUT | GPIO_SEL_1P8V) +GPIO(EC_I2C_SENSOR_SDA, PIN(B, 2), GPIO_INPUT | GPIO_SEL_1P8V) + +/* Board/SKU IDs */ +GPIO(BRD_ID0, PIN(C, 7), GPIO_INPUT) +GPIO(BRD_ID1, PIN(9, 3), GPIO_INPUT) +GPIO(BRD_ID2, PIN(6, 3), GPIO_INPUT) +GPIO(SKU_ID0, PIN(F, 0), GPIO_INPUT) +GPIO(SKU_ID1, PIN(4, 1), GPIO_INPUT) +GPIO(SKU_ID2, PIN(D, 4), GPIO_INPUT) + +/* Switchcap */ +/* + * GPIO0 is configured as PVC_PG. When the chip in power down mode, it outputs + * high-Z. Set pull-down to avoid floating. + */ +GPIO(SWITCHCAP_GPIO_1, PIN(E, 2), GPIO_INPUT | GPIO_PULL_DOWN) /* Switchcap GPIO0 */ + +/* Special straps */ +GPIO(ARM_X86, PIN(6, 6), GPIO_OUT_LOW) /* NC, low for power saving */ + +/* Unused GPIOs, NC. */ +UNUSED(PIN(5, 1)) +UNUSED(PIN(D, 0)) +UNUSED(PIN(F, 3)) +UNUSED(PIN(9, 4)) +UNUSED(PIN(9, 7)) +UNUSED(PIN(A, 7)) +UNUSED(PIN(B, 0)) +UNUSED(PIN(A, 5)) +UNUSED(PIN(3, 5)) +UNUSED(PIN(7, 2)) +UNUSED(PIN(8, 1)) +UNUSED(PIN(3, 7)) +UNUSED(PIN(7, 6)) +UNUSED(PIN(3, 4)) +UNUSED(PIN(C, 5)) +UNUSED(PIN(7, 3)) +UNUSED(PIN(D, 7)) +UNUSED(PIN(A, 3)) +UNUSED(PIN(6, 2)) +UNUSED(PIN(0, 4)) +UNUSED(PIN(8, 3)) +UNUSED(PIN(B, 1)) +UNUSED(PIN(5, 0)) +UNUSED(PIN(D, 3)) + +/* Alternate functions GPIO definitions */ +ALTERNATE(PIN_MASK(6, 0x30), 0, MODULE_UART, 0) /* UART (GPIO64/65) */ +ALTERNATE(PIN_MASK(B, 0x30), 1, MODULE_I2C, 0) /* I2C0 (GPIOB4/B5) */ +ALTERNATE(PIN_MASK(9, 0x07), 1, MODULE_I2C, 0) /* I2C1 SDA (GPIO90), I2C2 (GPIO91/92) */ +ALTERNATE(PIN_MASK(8, 0x80), 1, MODULE_I2C, 0) /* I2C1 SCL (GPIO87) */ +ALTERNATE(PIN_MASK(3, 0x48), 1, MODULE_I2C, 0) /* I2C5 (GPIO33/36) */ +ALTERNATE(PIN_MASK(B, 0x0C), 1, MODULE_I2C, GPIO_SEL_1P8V) /* I2C7 (GPIOB2/B3) - 1.8V */ +ALTERNATE(PIN_MASK(4, 0x1C), 0, MODULE_ADC, 0) /* ADC1 (GPIO44), ADC2 (GPIO43), ADC3 (GPIO42) */ +ALTERNATE(PIN_MASK(4, 0xC0), 1, MODULE_SPI, GPIO_SEL_1P8V) /* SHI_SDO (GPIO47), SHI_SDI (GPIO46) */ +ALTERNATE(PIN_MASK(5, 0x28), 1, MODULE_SPI, GPIO_SEL_1P8V) /* SHI_SCLK (GPIO55), SHI_CS# (GPIO53) */ +ALTERNATE(PIN_MASK(8, 0x01), 0, MODULE_PWM, 0) /* PWM3 (GPIO80) - KB_BL_PWM */ +ALTERNATE(PIN_MASK(B, 0x80), 1, MODULE_PWM, 0) /* PWM5 (GPIOB7) - EDP_BKLTCTL */ + +/* Keyboard */ +#define GPIO_KB_INPUT (GPIO_INPUT | GPIO_PULL_UP) +#define GPIO_KB_OUTPUT (GPIO_ODR_HIGH) +#define GPIO_KB_OUTPUT_COL2 (GPIO_OUT_LOW) + +/* Keyboard alternate functions */ +ALTERNATE(PIN_MASK(0, 0xE0), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) /* KSO10 (GPIO07), KSO11 (GPIO06), KSO12 (GPIO05) */ +ALTERNATE(PIN_MASK(1, 0x7F), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) /* KSO03 (GPIO16), KSO04 (GPIO15), KSO05 (GPIO14), KSO06 (GPIO13), KSO07 (GPIO12), KSO08 (GPIO11), KSO09 (GPIO10) */ +ALTERNATE(PIN_MASK(2, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_OUTPUT) /* KSO00 (GPIO21), KSO01 (GPIO20) */ +ALTERNATE(PIN_MASK(2, 0xFC), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI2 (GPIO27), KSI3 (GPIO26), KSI4 (GPIO25), KSI5 (GPIO24), KSI6 (GPIO23), KSI7 (GPIO22) */ +ALTERNATE(PIN_MASK(3, 0x03), 0, MODULE_KEYBOARD_SCAN, GPIO_KB_INPUT) /* KSI0 (GPIO31), KSI1 (GPIO30) */ +GPIO(EC_KSO_02_INV, PIN(1, 7), GPIO_KB_OUTPUT_COL2) /* KSO02 (GPIO17) */ diff --git a/board/pazquel/led.c b/board/pazquel/led.c new file mode 100644 index 0000000000..295c8effeb --- /dev/null +++ b/board/pazquel/led.c @@ -0,0 +1,163 @@ +/* Copyright 2021 The Chromium OS Authors. All rights reserved. + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + * + * Power and battery LED control. + */ + +#include "battery.h" +#include "charge_manager.h" +#include "charge_state.h" +#include "chipset.h" +#include "ec_commands.h" +#include "gpio.h" +#include "hooks.h" +#include "host_command.h" +#include "led_common.h" +#include "system.h" +#include "util.h" + +#define BAT_LED_ON 1 +#define BAT_LED_OFF 0 + +const enum ec_led_id supported_led_ids[] = { + EC_LED_ID_RIGHT_LED, + EC_LED_ID_LEFT_LED, +}; + +const int supported_led_ids_count = ARRAY_SIZE(supported_led_ids); + +enum led_color { + LED_OFF = 0, + LED_AMBER, + LED_WHITE, + LED_COLOR_COUNT /* Number of colors, not a color itself */ +}; + +static void side_led_set_color(int port, enum led_color color) +{ + gpio_set_level(port ? GPIO_EC_CHG_LED_Y_C1 : GPIO_EC_CHG_LED_Y_C0, + (color == LED_AMBER) ? BAT_LED_ON : BAT_LED_OFF); + gpio_set_level(port ? GPIO_EC_CHG_LED_W_C1 : GPIO_EC_CHG_LED_W_C0, + (color == LED_WHITE) ? BAT_LED_ON : BAT_LED_OFF); +} + +void led_get_brightness_range(enum ec_led_id led_id, uint8_t *brightness_range) +{ + brightness_range[EC_LED_COLOR_AMBER] = 1; + brightness_range[EC_LED_COLOR_WHITE] = 1; +} + +int led_set_brightness(enum ec_led_id led_id, const uint8_t *brightness) +{ + int port; + + switch (led_id) { + case EC_LED_ID_RIGHT_LED: + port = 0; + break; + case EC_LED_ID_LEFT_LED: + port = 1; + break; + default: + return EC_ERROR_PARAM1; + } + + if (brightness[EC_LED_COLOR_WHITE] != 0) + side_led_set_color(port, LED_WHITE); + else if (brightness[EC_LED_COLOR_AMBER] != 0) + side_led_set_color(port, LED_AMBER); + else + side_led_set_color(port, LED_OFF); + + return EC_SUCCESS; +} + +/* + * Set active charge port color to the parameter, turn off all others. + * If no port is active (-1), turn off all LEDs. + */ +static void set_active_port_color(enum led_color color) +{ + int port = charge_manager_get_active_charge_port(); + + if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) + side_led_set_color(0, (port == 0) ? color : LED_OFF); + if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED)) + side_led_set_color(1, (port == 1) ? color : LED_OFF); +} + +static void board_led_set_battery(void) +{ + static int battery_ticks; + uint32_t chflags = charge_get_flags(); + + battery_ticks++; + + switch (charge_get_state()) { + case PWR_STATE_CHARGE: + /* Always indicate when charging, even in suspend. */ + set_active_port_color(LED_AMBER); + break; + case PWR_STATE_DISCHARGE: + if (led_auto_control_is_enabled(EC_LED_ID_RIGHT_LED)) { + if (charge_get_percent() <= 10) + side_led_set_color(0, + (battery_ticks & 0x4) ? LED_WHITE : LED_OFF); + else + side_led_set_color(0, LED_OFF); + } + + if (led_auto_control_is_enabled(EC_LED_ID_LEFT_LED)) + side_led_set_color(1, LED_OFF); + break; + case PWR_STATE_ERROR: + set_active_port_color((battery_ticks & 0x2) ? + LED_WHITE : LED_OFF); + break; + case PWR_STATE_CHARGE_NEAR_FULL: + set_active_port_color(LED_WHITE); + break; + case PWR_STATE_IDLE: /* External power connected in IDLE */ + if (chflags & CHARGE_FLAG_FORCE_IDLE) + set_active_port_color((battery_ticks & 0x4) ? + LED_AMBER : LED_OFF); + else + set_active_port_color(LED_WHITE); + break; + default: + /* Other states don't alter LED behavior */ + break; + } +} + +/* Called by hook task every TICK */ +static void led_tick(void) +{ + board_led_set_battery(); +} +DECLARE_HOOK(HOOK_TICK, led_tick, HOOK_PRIO_DEFAULT); + +void led_control(enum ec_led_id led_id, enum ec_led_state state) +{ + enum led_color color; + + if ((led_id != EC_LED_ID_RECOVERY_HW_REINIT_LED) && + (led_id != EC_LED_ID_SYSRQ_DEBUG_LED)) + return; + + if (state == LED_STATE_RESET) { + led_auto_control(EC_LED_ID_LEFT_LED, 1); + led_auto_control(EC_LED_ID_RIGHT_LED, 1); + board_led_set_battery(); + return; + } + + color = state ? LED_WHITE : LED_OFF; + + led_auto_control(EC_LED_ID_LEFT_LED, 0); + led_auto_control(EC_LED_ID_RIGHT_LED, 0); + + side_led_set_color(0, color); + side_led_set_color(1, color); +} diff --git a/board/pazquel/vif_override.xml b/board/pazquel/vif_override.xml new file mode 100644 index 0000000000..32736caf64 --- /dev/null +++ b/board/pazquel/vif_override.xml @@ -0,0 +1,3 @@ + -- cgit v1.2.1