From 3e8d6447b38d8083ef6e6c6321e0e5b8b9f9c38f Mon Sep 17 00:00:00 2001 From: Leifu Zhao Date: Fri, 14 Feb 2020 10:57:59 +0800 Subject: ish: board level PM enablement for tgl rvp Board level power management enablement for tgl rvp. BUG=b:149238813 BRANCH=none TEST=ISH can successfully enter into D0i1/D0i2/D0i3 on tgl rvp. Signed-off-by: Leifu Zhao Change-Id: Ie1eaa532a38a286ca47540cb41edc8044cd7352b Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2056150 Reviewed-by: Leifu Zhao Reviewed-by: Jack Rosenthal Tested-by: Leifu Zhao Commit-Queue: Jack Rosenthal Auto-Submit: Leifu Zhao --- board/tglrvp_ish/board.h | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) (limited to 'board/tglrvp_ish') diff --git a/board/tglrvp_ish/board.h b/board/tglrvp_ish/board.h index cadd6cf8fe..07de274bdd 100644 --- a/board/tglrvp_ish/board.h +++ b/board/tglrvp_ish/board.h @@ -67,6 +67,23 @@ #undef CONFIG_ADC #undef CONFIG_SHA256 +/* DMA paging between SRAM and DRAM */ +#define CONFIG_DMA_PAGING + +/* power management definitions */ +#define CONFIG_LOW_POWER_IDLE + +#define CONFIG_ISH_PM_D0I1 +#define CONFIG_ISH_PM_D0I2 +#define CONFIG_ISH_PM_D0I3 +#define CONFIG_ISH_PM_D3 +#define CONFIG_ISH_PM_RESET_PREP + +#define CONFIG_ISH_D0I2_MIN_USEC (15*MSEC) +#define CONFIG_ISH_D0I3_MIN_USEC (50*MSEC) + +#define CONFIG_ISH_NEW_PM + #ifndef __ASSEMBLER__ #include "gpio_signal.h" -- cgit v1.2.1