From 578f1889af8d689e55e62d163d7da565528ec817 Mon Sep 17 00:00:00 2001 From: li feng Date: Tue, 7 Jul 2015 13:58:24 -0700 Subject: Strago/Cyan: Change USB power pin name to generic one. Removed USB enable/disable as it will be handled by HOOK task as CONFIG_USB_PORT_POWER_SMART is enabled. BUG=none TEST=Verified on Acer EVT GPIO USB1_ENABLE and USB2_ENABLE value changed when state switch between S3 and S5. BRANCH=none Change-Id: I85f2047c1a40aebf36743a17d353ff3bc481d867 Signed-off-by: li feng Signed-off-by: Divya Jyothi Reviewed-on: https://chromium-review.googlesource.com/283593 Reviewed-by: Shawn N --- board/cyan/gpio.inc | 4 ++-- board/strago/gpio.inc | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) (limited to 'board') diff --git a/board/cyan/gpio.inc b/board/cyan/gpio.inc index e2298628c4..44dd70920a 100644 --- a/board/cyan/gpio.inc +++ b/board/cyan/gpio.inc @@ -30,7 +30,7 @@ GPIO(PCH_SCI_L, PIN(26), GPIO_ODR_HIGH) /* SCI output GPIO(NC_31, PIN(31), GPIO_INPUT | GPIO_PULL_UP) /* NC */ GPIO(NC_34, PIN(34), GPIO_INPUT | GPIO_PULL_UP) /* NC */ -GPIO(USB2_PWR_EN, PIN(36), GPIO_OUT_LOW) /* Enable power for USB2 Port */ +GPIO(USB2_ENABLE, PIN(36), GPIO_OUT_LOW) /* Enable power for USB2 Port */ GPIO(ENTERING_RW, PIN(41), GPIO_OUT_LOW) /* Indicate when EC is entering RW code */ GPIO(PCH_SMI_L, PIN(44), GPIO_ODR_HIGH) /* SMI output */ @@ -52,7 +52,7 @@ GPIO(BATT_EN_L, PIN(62), GPIO_INPUT) /* Will be NC GPIO(NC_64, PIN(64), GPIO_INPUT | GPIO_PULL_UP) /* NC */ GPIO(PCH_SYS_PWROK, PIN(65), GPIO_OUT_LOW) /* EC thinks everything is up and ready (DELAY_ALL_SYS_PWRGD) */ GPIO(PCH_WAKE_L, PIN(66), GPIO_ODR_HIGH) /* PCH wake pin */ -GPIO(USB3_PWR_EN, PIN(67), GPIO_OUT_LOW) /* Enable power for USB3 Port */ +GPIO(USB1_ENABLE, PIN(67), GPIO_OUT_LOW) /* Enable power for USB3 Port */ GPIO(USB_CTL1, PIN(105), GPIO_OUT_HIGH) /* USB charging mode control */ diff --git a/board/strago/gpio.inc b/board/strago/gpio.inc index fd78fa7e3b..e08bb7477c 100644 --- a/board/strago/gpio.inc +++ b/board/strago/gpio.inc @@ -46,7 +46,7 @@ GPIO(WP_L, PIN(33), GPIO_INPUT) /* EC_SPI_WP_ME_ #ifndef CONFIG_BUTTON_COUNT GPIO(VOLUME_DOWN, PIN(34), GPIO_INPUT) /* Volume down button */ #endif -GPIO(USB2_PWR_EN, PIN(36), GPIO_OUT_LOW) /* Enable power for USB2 Port */ +GPIO(USB2_ENABLE, PIN(36), GPIO_OUT_LOW) /* Enable power for USB2 Port */ GPIO(ENTERING_RW, PIN(41), GPIO_OUT_LOW) /* Indicate when EC is entering RW code */ GPIO(PCH_SMI_L, PIN(44), GPIO_ODR_HIGH) /* SMI output */ @@ -64,7 +64,7 @@ GPIO(EC_ADC0, PIN(61), GPIO_INPUT) /* EC_ADC0 */ GPIO(EC_HIB_L, PIN(64), GPIO_OUT_LOW) /* Set to high before Pseduo G3 */ GPIO(PCH_SYS_PWROK, PIN(65), GPIO_OUT_LOW) /* EC thinks everything is up and ready (DELAY_ALL_SYS_PWRGD) */ GPIO(PCH_WAKE_L, PIN(66), GPIO_ODR_HIGH) /* PCH wake pin */ -GPIO(USB3_PWR_EN, PIN(67), GPIO_OUT_LOW) /* Enable power for USB3 Port */ +GPIO(USB1_ENABLE, PIN(67), GPIO_OUT_LOW) /* Enable power for USB3 Port */ GPIO(NC_GPIO100, PIN(100), GPIO_INPUT | GPIO_PULL_UP) /* NC */ GPIO(NC_GPIO101, PIN(101), GPIO_INPUT | GPIO_PULL_UP) /* NC */ -- cgit v1.2.1