From 73bcc19842a80643ce6f34e0aef5028c299cc2bb Mon Sep 17 00:00:00 2001
From: Vadim Bendebury <vbendeb@chromium.org>
Date: Fri, 26 Oct 2018 14:45:51 -0700
Subject: g: provide API to disable clock jitter

Sometimes it is necessary to disable clock jitter, this patch
introduces a new chip API which would allow to do just that. Actual
disable is possible only if the chip is not yet running on lowered
security level.

BRANCH=cr50, cr50-mp
BUG=b:75976718
TEST=with the rest of the patches applied verified that it is possible
     to disable clock jitter during startup to be able to generate ITE
     SYNC sequence.

     Also observed expected console output, like:

   [0.007225 init_jittery_clock_locking_optional: run level high, \
         request to enable]

Change-Id: I624d781a961cdc17749de4fa80fad0f682537e01
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/1305117
Reviewed-by: Mary Ruthven <mruthven@chromium.org>
---
 chip/g/jitter.c | 91 +++++++++++++++++++++++++++++++++++++--------------------
 1 file changed, 59 insertions(+), 32 deletions(-)

(limited to 'chip/g/jitter.c')

diff --git a/chip/g/jitter.c b/chip/g/jitter.c
index 4715972497..bb6edaa805 100644
--- a/chip/g/jitter.c
+++ b/chip/g/jitter.c
@@ -11,36 +11,58 @@
 
 #define CPRINTS(format, args...) cprints(CC_USB, format, ## args)
 
-void init_jittery_clock(int highsec)
+void init_jittery_clock_locking_optional(int highsec, int enable,
+					 int lock_required)
 {
-	unsigned trimfast = GR_FUSE(RC_JTR_OSC60_CC_TRIM);
-	unsigned trim48 = GR_FUSE(RC_JTR_OSC48_CC_TRIM);
-	unsigned delta = (trim48 - trimfast);
-	/* For metastability reasons, avoid clk_jtr ~= clk_timer, make
-	 * a keepout region around 24MHz of about 0.75MHz, about 3/16 of the
-	 * the delta from trimfast and trim48 */
-	unsigned skiplow = (trim48 << 4) - (delta * 6);
-	unsigned skiphigh = (trim48 << 4) + (delta * 6);
-	unsigned setting = trimfast << 4;
-	unsigned stepx16;
-	unsigned bankval;
-	int bank;
-
-	if (highsec)
-		stepx16 = (delta * 7) >> 1;
-	else
-		stepx16 = 2 * (trim48 - trimfast);
-
-	for (bank = 0; bank < 16; bank++) {
-		/* saturate at 0xff */
-		bankval = (setting > 0xfff) ? 0xff : (setting >> 4);
-
-		if (runlevel_is_high())
+	int rl = runlevel_is_high();
+
+	if (lock_required) {
+		CPRINTS("%s: run level %s, request to %sable",	__func__,
+			rl ? "high" : "low", enable ? "en" : "dis");
+	}
+
+	if (rl) {
+		uint32_t trimfast = GR_FUSE(RC_JTR_OSC60_CC_TRIM);
+		uint32_t trim48 = GR_FUSE(RC_JTR_OSC48_CC_TRIM);
+		uint32_t delta = (trim48 - trimfast);
+		/*
+		 * For metastability reasons, avoid clk_jtr ~= clk_timer, make
+		 * a keepout region around 24MHz of about 0.75MHz, about 3/16
+		 * of the the delta from trimfast and trim48
+		 */
+		uint32_t skiplow = (trim48 << 4) - (delta * 6);
+		uint32_t skiphigh = (trim48 << 4) + (delta * 6);
+		uint32_t setting = trimfast << 4;
+		uint32_t stepx16;
+		uint32_t bankval;
+		int bank;
+
+		if (highsec)
+			stepx16 = (delta * 7) >> 1;
+		else
+			stepx16 = 2 * (trim48 - trimfast);
+
+		for (bank = 0; bank < 16; bank++) {
+
+			if (!enable) {
+				/*
+				 * Jitter should not be enabled, set all trims
+				 * to the same value retrieved from the fuses.
+				 * It is supposed to ensure that the internal
+				 * clock runs at 48MHz.
+				 */
+				GR_XO_JTR_JITTERY_TRIM_BANK(bank) = trim48;
+				continue;
+			}
+			/* saturate at 0xff */
+			bankval = (setting > 0xfff) ? 0xff : (setting >> 4);
+
 			GR_XO_JTR_JITTERY_TRIM_BANK(bank) = bankval;
 
-		setting += stepx16;
-		if ((setting > skiplow) && (setting < skiphigh))
-			setting = skiphigh;
+			setting += stepx16;
+			if ((setting > skiplow) && (setting < skiphigh))
+				setting = skiphigh;
+		}
 	}
 
 	GWRITE_FIELD(XO, CLK_JTR_TRIM_CTRL, RC_COARSE_TRIM_SRC, 2);
@@ -49,11 +71,16 @@ void init_jittery_clock(int highsec)
 	GREG32(XO, CLK_JTR_JITTERY_TRIM_EN) = 1;
 	GREG32(XO, CLK_JTR_SYNC_CONTENTS) = 0;
 
-	/* Writing any value locks things until the next hard reboot */
-	/* crosbug.com/p/54916
-	   GREG32(XO, CFG_WR_EN) = 0;
-	   GREG32(XO, JTR_CTRL_EN) = 0;
-	*/
+	if (lock_required) {
+		/* Writing any value locks things until the next hard reboot */
+		GREG32(XO, CFG_WR_EN) = 0;
+		GREG32(XO, JTR_CTRL_EN) = 0;
+	}
+}
+
+void init_jittery_clock(int highsec)
+{
+	init_jittery_clock_locking_optional(highsec, 1, 1);
 }
 
 void init_sof_clock(void)
-- 
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