From f33ff43d938354bdf563d1e54da1c09db4e23d42 Mon Sep 17 00:00:00 2001 From: Dino Li Date: Fri, 11 Sep 2015 10:53:23 +0800 Subject: it8380dev: fix lpc module 1. add lpc_keyboard_clear_buffer() function. 2. Enable P80L function, that LPC I/O port 80h data can be mapped to BRAM bank1 (offset 0x80 ~ 0xBF). Signed-off-by: Dino Li BRANCH=none BUG=none TEST=1. The lpc_keyboard_clear_buffer() function can clear OBF. 2. 80h port, console command port80. 3. 62h/66h port. 3-a. out 66h 80h, out 62h 00h, in 62h 02h 3-b. out 66h 81h, out 62h 01h, out 62h 55h 3-c. out 66h 80h, out 62h 01h, in 62h 55h 3-d. out 66h 80h, out 62h 02h, in 62h aah 4. Host command "version". Change-Id: Id2b5a5813cbe8edfc4ecc7b153874b819d460f43 Reviewed-on: https://chromium-review.googlesource.com/298421 Commit-Ready: Dino Li Tested-by: Dino Li Reviewed-by: Randall Spangler --- chip/it83xx/ec2i_chip.h | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'chip/it83xx/ec2i_chip.h') diff --git a/chip/it83xx/ec2i_chip.h b/chip/it83xx/ec2i_chip.h index 953903226b..7b9fe1cf4e 100644 --- a/chip/it83xx/ec2i_chip.h +++ b/chip/it83xx/ec2i_chip.h @@ -8,6 +8,11 @@ #ifndef __CROS_EC_EC2I_CHIP_H #define __CROS_EC_EC2I_CHIP_H +#define P80L_P80LB 0 +#define P80L_P80LE 0x3F +#define P80L_P80LC 0 +#define P80L_BRAM_BANK1_MAX_SIZE 0x3F + /* Index list of the host interface registers of PNPCFG */ enum host_pnpcfg_index { /* Logical Device Number */ -- cgit v1.2.1