From c6928bce0b896d6c34f386e72a859060cc59ac93 Mon Sep 17 00:00:00 2001 From: Dino Li Date: Thu, 5 Jan 2017 11:07:33 +0800 Subject: nds32: lds: reduce gap of flash - Before the change was made, the "__ro_end" was at 00013520h. We change to 00012760h. - Rename "CONFIG_IT83XX_ILM_BLOCK_SIZE" to "IT83XX_ILM_BLOCK_SIZE" this is because we don't support reconfiguration at board-level. - Put some task functions into "__ram_code" section to fill the gap and improving performance of code-fetch. Signed-off-by: Dino Li BRANCH=none BUG=none TEST=console commands: flasherase, flashwrite, and flashread. Change-Id: I2f2906a2a0b6971aadd00120c282801161447808 Reviewed-on: https://chromium-review.googlesource.com/424248 Commit-Ready: Dino Li Tested-by: Dino Li Reviewed-by: Randall Spangler --- chip/it83xx/config_chip.h | 7 ++++++- chip/it83xx/flash.c | 2 +- 2 files changed, 7 insertions(+), 2 deletions(-) (limited to 'chip/it83xx') diff --git a/chip/it83xx/config_chip.h b/chip/it83xx/config_chip.h index d0691ce98f..2f1f049dd9 100644 --- a/chip/it83xx/config_chip.h +++ b/chip/it83xx/config_chip.h @@ -50,7 +50,12 @@ #define CONFIG_FLASH_ERASE_SIZE 0x00000400 /* erase bank size */ #define CONFIG_FLASH_WRITE_SIZE 0x00000004 /* minimum write size */ -#define CONFIG_IT83XX_ILM_BLOCK_SIZE 0x00001000 +/* + * This is the block size of the ILM on the it83xx chip. + * The ILM for static code cache, CPU fetch instruction from + * ILM(ILM -> CPU)instead of flash(flash -> IMMU -> CPU) if enabled. + */ +#define IT83XX_ILM_BLOCK_SIZE 0x00001000 /* * The AAI program instruction allows continue write flash diff --git a/chip/it83xx/flash.c b/chip/it83xx/flash.c index d80c9dfd57..c450815420 100644 --- a/chip/it83xx/flash.c +++ b/chip/it83xx/flash.c @@ -533,7 +533,7 @@ static void flash_code_static_dma(void) /* Copy to DLM */ IT83XX_GCTRL_MCCR2 |= 0x20; memcpy((void *)SCAR2_ILM2_DLM14, (const void *)FLASH_DMA_START, - CONFIG_IT83XX_ILM_BLOCK_SIZE); + IT83XX_ILM_BLOCK_SIZE); IT83XX_GCTRL_MCCR2 &= ~0x20; /* -- cgit v1.2.1