From 4da2dfcbec94cac411ec73910dcabbc62a44f90d Mon Sep 17 00:00:00 2001 From: Mulin Chao Date: Mon, 26 Mar 2018 13:25:45 +0800 Subject: npcx: lpc: fixed bug that ec gets stuck in lpc_sib_wait_hostxx routines. If an ITIM32 timeout event occurred during lpc_sib_wait_host_read_done() and lpc_sib_wait_host_write_done() routines, in rare case, ec might have a chance to gets stuck since ec's interrupts are disabled when CSWR/CSRD bits are high forever. (Normally, CSWR/CSRD bits won't be always high. These bits are high forever also means something wrong on LPC/eSPI bus.) In order to prevent this situation, the CL checks TO_STS bit of ITCTS in these routines. If this bit is set, restoring ITIM32 preload counter value to maximum value and processing overflow will be done by force_time(). BRANCH=eve,fizz,poppy BUG=b:76182199 TEST=No build errors for npcx series. Passed test command of CL 979389 on npcx_evb. No symptom occurred during warm reset stress test on soraka. Change-Id: Ic645f7c5a2a1e49a3c1f3d7e089dd66b4bb75ac6 Signed-off-by: Mulin Chao Reviewed-on: https://chromium-review.googlesource.com/979874 Reviewed-by: Nicolas Boichat --- chip/npcx/hwtimer_chip.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'chip/npcx/hwtimer_chip.h') diff --git a/chip/npcx/hwtimer_chip.h b/chip/npcx/hwtimer_chip.h index 08cf8e278f..3b00b0dea5 100644 --- a/chip/npcx/hwtimer_chip.h +++ b/chip/npcx/hwtimer_chip.h @@ -32,4 +32,7 @@ uint16_t __hw_clock_event_count(void); /* Returns time delay because of deep idle */ uint32_t __hw_clock_get_sleep_time(uint16_t pre_evt_cnt); +/* Handle ITIM32 overflow if interrupt is disabled */ +void __hw_clock_handle_overflow(uint32_t clksrc_high); + #endif /* __CROS_EC_HWTIMER_CHIP_H */ -- cgit v1.2.1