From 7f1e4df5134820e9b38b720afd761156c79cd6b8 Mon Sep 17 00:00:00 2001 From: Jack Rosenthal Date: Mon, 27 Jun 2022 14:25:07 -0600 Subject: chip/npcx/pwm.c: Format with clang-format BUG=b:236386294 BRANCH=none TEST=none Change-Id: I124967cddefea1a5cf0f683e76c8ca61f686e798 Signed-off-by: Jack Rosenthal Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3727024 Reviewed-by: Jeremy Bettis --- chip/npcx/pwm.c | 34 +++++++++++++++++----------------- 1 file changed, 17 insertions(+), 17 deletions(-) (limited to 'chip/npcx/pwm.c') diff --git a/chip/npcx/pwm.c b/chip/npcx/pwm.c index b2016906b3..de39da52a1 100644 --- a/chip/npcx/pwm.c +++ b/chip/npcx/pwm.c @@ -23,7 +23,7 @@ #if !(DEBUG_PWM) #define CPRINTS(...) #else -#define CPRINTS(format, args...) cprints(CC_PWM, format, ## args) +#define CPRINTS(format, args...) cprints(CC_PWM, format, ##args) #endif /* pwm resolution for each channel */ @@ -31,20 +31,20 @@ static uint32_t pwm_res[PWM_CH_COUNT]; /* PWM clock source */ enum npcx_pwm_source_clock { - NPCX_PWM_CLOCK_APB2_LFCLK = 0, - NPCX_PWM_CLOCK_FX = 1, - NPCX_PWM_CLOCK_FR = 2, - NPCX_PWM_CLOCK_RESERVED = 3, - NPCX_PWM_CLOCK_UNDEF = 0xFF + NPCX_PWM_CLOCK_APB2_LFCLK = 0, + NPCX_PWM_CLOCK_FX = 1, + NPCX_PWM_CLOCK_FR = 2, + NPCX_PWM_CLOCK_RESERVED = 3, + NPCX_PWM_CLOCK_UNDEF = 0xFF }; /* PWM heartbeat mode */ enum npcx_pwm_heartbeat_mode { - NPCX_PWM_HBM_NORMAL = 0, - NPCX_PWM_HBM_25 = 1, - NPCX_PWM_HBM_50 = 2, - NPCX_PWM_HBM_100 = 3, - NPCX_PWM_HBM_UNDEF = 0xFF + NPCX_PWM_HBM_NORMAL = 0, + NPCX_PWM_HBM_25 = 1, + NPCX_PWM_HBM_50 = 2, + NPCX_PWM_HBM_100 = 3, + NPCX_PWM_HBM_UNDEF = 0xFF }; /** @@ -146,7 +146,7 @@ void pwm_set_raw_duty(enum pwm_channel ch, uint16_t duty) /* Assume the fan control is active high and invert it ourselves */ UPDATE_BIT(NPCX_PWMCTL(mdl), NPCX_PWMCTL_INVP, - (pwm_channels[ch].flags & PWM_CONFIG_ACTIVE_LOW)); + (pwm_channels[ch].flags & PWM_CONFIG_ACTIVE_LOW)); CPRINTS("initial freq=0x%x", pwm_channels[ch].freq); CPRINTS("duty_cycle_cnt=%d", duty); @@ -189,7 +189,7 @@ uint16_t pwm_get_raw_duty(enum pwm_channel ch) * so scale to 0 - 0xffff */ return DIV_ROUND_NEAREST(NPCX_DCR(mdl) * EC_PWM_MAX_DUTY, - pwm_res[ch]); + pwm_res[ch]); } /** @@ -206,22 +206,22 @@ void pwm_config(enum pwm_channel ch) /* Set PWM heartbeat mode is no heartbeat */ SET_FIELD(NPCX_PWMCTL(mdl), NPCX_PWMCTL_HB_DC_CTL_FIELD, - NPCX_PWM_HBM_NORMAL); + NPCX_PWM_HBM_NORMAL); /* Select default CLK or LFCLK clock input to PWM module */ SET_FIELD(NPCX_PWMCTLEX(mdl), NPCX_PWMCTLEX_FCK_SEL_FIELD, - NPCX_PWM_CLOCK_APB2_LFCLK); + NPCX_PWM_CLOCK_APB2_LFCLK); /* Set PWM polarity normal first */ CLEAR_BIT(NPCX_PWMCTL(mdl), NPCX_PWMCTL_INVP); /* Select PWM clock source */ UPDATE_BIT(NPCX_PWMCTL(mdl), NPCX_PWMCTL_CKSEL, - (pwm_channels[ch].flags & PWM_CONFIG_DSLEEP)); + (pwm_channels[ch].flags & PWM_CONFIG_DSLEEP)); /* Select PWM IO type */ UPDATE_BIT(NPCX_PWMCTLEX(mdl), NPCX_PWMCTLEX_OD_OUT, - (pwm_channels[ch].flags & PWM_CONFIG_OPEN_DRAIN)); + (pwm_channels[ch].flags & PWM_CONFIG_OPEN_DRAIN)); /* Set PWM operation frequency */ pwm_set_freq(ch, pwm_channels[ch].freq); -- cgit v1.2.1 From a639c13eca2e4c1982e8b7d699a8b387e6bb030d Mon Sep 17 00:00:00 2001 From: Yuval Peress Date: Thu, 28 Jul 2022 11:23:22 -0600 Subject: util: remove unused includes Remove these includes as they're not needed in this header. Instead, the includes should go where they're actually being used. BRANCH=none BUG=b:240574048 TEST=make buildall -j TEST=zmake build -a Signed-off-by: Yuval Peress Change-Id: I64b10af3216654b2a20caa1cabd267661a0bca39 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3791980 Reviewed-by: Tristan Honscheid Commit-Queue: Tristan Honscheid --- chip/npcx/pwm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'chip/npcx/pwm.c') diff --git a/chip/npcx/pwm.c b/chip/npcx/pwm.c index de39da52a1..905a7bcb25 100644 --- a/chip/npcx/pwm.c +++ b/chip/npcx/pwm.c @@ -8,7 +8,7 @@ * On this chip, the PWM logic is implemented by the hardware FAN modules. */ -#include "assert.h" +#include "builtin/assert.h" #include "clock.h" #include "clock_chip.h" #include "console.h" -- cgit v1.2.1 From 71b2ef709dcb14260f5fdaa3ab4ced005a29fb46 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 12 Sep 2022 14:54:36 -0400 Subject: Update license boilerplate text in source code files Normally we don't do this, but enough changes have accumulated that we're doing a tree-wide one-off update of the name & style. BRANCH=none BUG=chromium:1098010 TEST=`repo upload` works Change-Id: Icd3a1723c20595356af83d190b2c6a9078b3013b Signed-off-by: Mike Frysinger Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3891203 Reviewed-by: Jeremy Bettis Reviewed-by: Jack Rosenthal --- chip/npcx/pwm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'chip/npcx/pwm.c') diff --git a/chip/npcx/pwm.c b/chip/npcx/pwm.c index 905a7bcb25..53a278a0ba 100644 --- a/chip/npcx/pwm.c +++ b/chip/npcx/pwm.c @@ -1,4 +1,4 @@ -/* Copyright 2014 The Chromium OS Authors. All rights reserved. +/* Copyright 2014 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -- cgit v1.2.1