From 39bd18b890bb708e79e9ba50dd3b5bf3d35e9ff1 Mon Sep 17 00:00:00 2001 From: Shawn Nematbakhsh Date: Mon, 11 May 2015 10:16:41 -0700 Subject: cleanup: Rename image geometry CONFIGs Rename image geometry configs with a uniform naming scheme to make their purposes more clear. CONFIG_RO_MEM_OFF (was CONFIG_FW_RO_OFF) - RO image offset in program memory CONFIG_RO_STORAGE_OFF (was CONFIG_RO_SPI_OFF) - RO image offset on storage CONFIG_RO_SIZE (was CONFIG_FW_RO_SIZE) - Size of RO image CONFIG_RW_MEM_OFF (was CONFIG_FW_RW_OFF) - RW image offset in program memory CONFIG_RW_STORAGE_OFF (was CONFIG_RW_SPI_OFF) - RW image offset on storage CONFIG_RW_SIZE (was CONFIG_FW_RW_SIZE) - Size of RW image CONFIG_WP_OFF (was CONFIG_FW_WP_RO_OFF) - Offset of WP region on storage CONFIG_WP_SIZE (was CONFIG_FW_WP_RO_SIZE) - Size of WP region on storage BUG=chrome-os-partner:39741,chrome-os-partner:23796 TEST=Set date / version strings to constants then `make buildall -j`. Verify that each ec.bin image is identical pre- and post-change. BRANCH=None Signed-off-by: Shawn Nematbakhsh Change-Id: I6ea0a4e456dae71c266fa917a309b9f6fa4b50cd Reviewed-on: https://chromium-review.googlesource.com/270189 Reviewed-by: Anton Staaf --- chip/nrf51/config_chip.h | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'chip/nrf51/config_chip.h') diff --git a/chip/nrf51/config_chip.h b/chip/nrf51/config_chip.h index 9de7b1eb76..104fceb0ca 100644 --- a/chip/nrf51/config_chip.h +++ b/chip/nrf51/config_chip.h @@ -48,17 +48,17 @@ #define CONFIG_FW_IMAGE_SIZE (128 * 1024) /* Define the RO/RW offset */ -#define CONFIG_FW_RO_OFF 0 -#define CONFIG_FW_RO_SIZE (CONFIG_FW_IMAGE_SIZE - CONFIG_FW_PSTATE_SIZE) -#define CONFIG_FW_RW_OFF CONFIG_FW_IMAGE_SIZE -#define CONFIG_FW_RW_SIZE CONFIG_FW_IMAGE_SIZE +#define CONFIG_RO_MEM_OFF 0 +#define CONFIG_RO_SIZE (CONFIG_FW_IMAGE_SIZE - CONFIG_FW_PSTATE_SIZE) +#define CONFIG_RW_MEM_OFF CONFIG_FW_IMAGE_SIZE +#define CONFIG_RW_SIZE CONFIG_FW_IMAGE_SIZE /* * Put pstate after RO to give RW more space and make RO write protect * region contiguous. */ -#define CONFIG_FW_PSTATE_SIZE CONFIG_FLASH_BANK_SIZE -#define CONFIG_FW_PSTATE_OFF (CONFIG_FW_RO_OFF + CONFIG_FW_RO_SIZE) +#define CONFIG_FW_PSTATE_SIZE CONFIG_FLASH_BANK_SIZE +#define CONFIG_FW_PSTATE_OFF (CONFIG_RO_MEM_OFF + CONFIG_RO_SIZE) /* Number of IRQ vectors on the NVIC */ -- cgit v1.2.1