From 4ada7739f96152ca688617c291c572417e34240c Mon Sep 17 00:00:00 2001 From: Myles Watson Date: Thu, 22 Jan 2015 09:49:23 -0800 Subject: nrf51: implement soft reset and hard reset TEST=manual test with the console command. Reset flags are set correctly. BRANCH=NONE BUG=None Change-Id: I3ea4301206be6fe4e79a4b49c002c020980c516d Signed-off-by: Myles Watson Reviewed-on: https://chromium-review.googlesource.com/242901 Reviewed-by: Vincent Palatin --- chip/nrf51/system.c | 30 +++++++++++++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) (limited to 'chip/nrf51') diff --git a/chip/nrf51/system.c b/chip/nrf51/system.c index 293911ca28..687b889a69 100644 --- a/chip/nrf51/system.c +++ b/chip/nrf51/system.c @@ -9,6 +9,8 @@ #include "console.h" #include "registers.h" #include "system.h" +#include "task.h" +#include "cpu.h" /* Console output macros */ #define CPUTS(outstr) cputs(CC_SYSTEM, outstr) @@ -67,10 +69,36 @@ static void check_reset_cause(void) NRF51_POWER_RESETREAS = raw_cause; } +static void system_watchdog_reset(void) +{ + if (NRF51_WDT_TIMEOUT != 0) { + /* Hard reset the WDT */ + NRF51_WDT_POWER = 0; + NRF51_WDT_POWER = 1; + } + + /* NRF51_WDT_CONFIG_HALT_RUN breaks this */ + NRF51_WDT_CONFIG = NRF51_WDT_CONFIG_SLEEP_RUN; + + NRF51_WDT_RREN = NRF51_WDT_RREN_BIT(0); + NRF51_WDT_CRV = 3; /* @32KHz */ + NRF51_WDT_START = 1; +} void system_reset(int flags) { - CPRINTS("TODO: implement %s(). Infinite loop.", __func__); + /* Disable interrupts to avoid task swaps during reboot */ + interrupt_disable(); + + if (flags & SYSTEM_RESET_HARD) + /* Ask the watchdog to trigger a hard reboot */ + system_watchdog_reset(); + else { + /* Use SYSRESETREQ to trigger a soft reboot */ + CPU_NVIC_APINT = 0x05fa0004; + } + + /* Spin and wait for reboot; should never return */ while (1) ; } -- cgit v1.2.1