From 4f8ea3f50e91232e3585fb3c3b981295498dc4c6 Mon Sep 17 00:00:00 2001 From: Jack Rosenthal Date: Mon, 27 Jun 2022 14:28:33 -0600 Subject: chip/stm32/dma-stm32f4.c: Format with clang-format BUG=b:236386294 BRANCH=none TEST=none Change-Id: I72732c67cd7820ec90869e277910ecf821418694 Signed-off-by: Jack Rosenthal Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3729492 Reviewed-by: Jeremy Bettis --- chip/stm32/dma-stm32f4.c | 51 +++++++++++++++++++++++------------------------- 1 file changed, 24 insertions(+), 27 deletions(-) (limited to 'chip/stm32/dma-stm32f4.c') diff --git a/chip/stm32/dma-stm32f4.c b/chip/stm32/dma-stm32f4.c index 3374cff7fc..e817d6ad95 100644 --- a/chip/stm32/dma-stm32f4.c +++ b/chip/stm32/dma-stm32f4.c @@ -14,15 +14,15 @@ /* Console output macros */ #define CPUTS(outstr) cputs(CC_DMA, outstr) -#define CPRINTF(format, args...) cprintf(CC_DMA, format, ## args) -#define CPRINTS(format, args...) cprints(CC_DMA, format, ## args) +#define CPRINTF(format, args...) cprintf(CC_DMA, format, ##args) +#define CPRINTS(format, args...) cprints(CC_DMA, format, ##args) stm32_dma_regs_t *STM32_DMA_REGS[] = { STM32_DMA1_REGS, STM32_DMA2_REGS }; /* Callback data to use when IRQ fires */ static struct { - void (*cb)(void *); /* Callback function to call */ - void *cb_data; /* Callback data for callback function */ + void (*cb)(void *); /* Callback function to call */ + void *cb_data; /* Callback data for callback function */ } dma_irq[STM32_DMAS_TOTAL_COUNT]; /** @@ -91,7 +91,7 @@ void dma_disable_all(void) * @param flags DMA flags for the control register. */ static void prepare_stream(enum dma_channel stream, unsigned count, - void *periph, void *memory, unsigned flags) + void *periph, void *memory, unsigned flags) { stm32_dma_stream_t *dma_stream = dma_get_channel(stream); uint32_t ccr = STM32_DMA_CCR_PL_VERY_HIGH; @@ -128,18 +128,17 @@ void dma_prepare_tx(const struct dma_option *option, unsigned count, * we're preparing the stream for transmit. */ prepare_stream(option->channel, count, option->periph, (void *)memory, - STM32_DMA_CCR_MINC | STM32_DMA_CCR_DIR_M2P | - option->flags); + STM32_DMA_CCR_MINC | STM32_DMA_CCR_DIR_M2P | + option->flags); } -void dma_start_rx(const struct dma_option *option, unsigned count, - void *memory) +void dma_start_rx(const struct dma_option *option, unsigned count, void *memory) { stm32_dma_stream_t *stream = dma_get_channel(option->channel); prepare_stream(option->channel, count, option->periph, memory, - STM32_DMA_CCR_MINC | STM32_DMA_CCR_DIR_P2M | - option->flags); + STM32_DMA_CCR_MINC | STM32_DMA_CCR_DIR_P2M | + option->flags); dma_go(stream); } @@ -176,10 +175,8 @@ void dma_dump(enum dma_channel stream) CPRINTF("scr=%x, sndtr=%x, spar=%x, sm0ar=%x, sfcr=%x\n", dma_stream->scr, dma_stream->sndtr, dma_stream->spar, dma_stream->sm0ar, dma_stream->sfcr); - CPRINTF("stream %d, isr=%x, ifcr=%x\n", - stream, - STM32_DMA_GET_ISR(stream), - STM32_DMA_GET_IFCR(stream)); + CPRINTF("stream %d, isr=%x, ifcr=%x\n", stream, + STM32_DMA_GET_ISR(stream), STM32_DMA_GET_IFCR(stream)); } void dma_check(enum dma_channel stream, char *buf) @@ -218,7 +215,7 @@ void dma_test(enum dma_channel stream) dma_stream->spar = (uint32_t)periph; dma_stream->sm0ar = (uint32_t)memory; dma_stream->sndtr = count; - dma_stream->sfcr &= ~STM32_DMA_SFCR_DMDIS; + dma_stream->sfcr &= ~STM32_DMA_SFCR_DMDIS; ctrl = STM32_DMA_CCR_PL_MEDIUM; dma_stream->scr = ctrl; @@ -300,17 +297,17 @@ void dma_clear_isr(enum dma_channel stream) } #ifdef CONFIG_DMA_DEFAULT_HANDLERS -#define STM32_DMA_IDX(dma, x) CONCAT4(STM32_DMA, dma, _STREAM, x) -#define STM32_DMA_FCT(dma, x) CONCAT4(dma_, dma, _event_interrupt_stream_, x) -#define DECLARE_DMA_IRQ(dma, x) \ - static void STM32_DMA_FCT(dma, x)(void) \ - { \ - dma_clear_isr(STM32_DMA_IDX(dma, x)); \ - if (dma_irq[STM32_DMA_IDX(dma, x)].cb != NULL) \ - (*dma_irq[STM32_DMA_IDX(dma, x)].cb) \ - (dma_irq[STM32_DMA_IDX(dma, x)].cb_data); \ - } \ - DECLARE_IRQ(CONCAT4(STM32_IRQ_DMA, dma, _STREAM, x), \ +#define STM32_DMA_IDX(dma, x) CONCAT4(STM32_DMA, dma, _STREAM, x) +#define STM32_DMA_FCT(dma, x) CONCAT4(dma_, dma, _event_interrupt_stream_, x) +#define DECLARE_DMA_IRQ(dma, x) \ + static void STM32_DMA_FCT(dma, x)(void) \ + { \ + dma_clear_isr(STM32_DMA_IDX(dma, x)); \ + if (dma_irq[STM32_DMA_IDX(dma, x)].cb != NULL) \ + (*dma_irq[STM32_DMA_IDX(dma, x)].cb)( \ + dma_irq[STM32_DMA_IDX(dma, x)].cb_data); \ + } \ + DECLARE_IRQ(CONCAT4(STM32_IRQ_DMA, dma, _STREAM, x), \ STM32_DMA_FCT(dma, x), 1); DECLARE_DMA_IRQ(1, 0); -- cgit v1.2.1 From 71b2ef709dcb14260f5fdaa3ab4ced005a29fb46 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Mon, 12 Sep 2022 14:54:36 -0400 Subject: Update license boilerplate text in source code files Normally we don't do this, but enough changes have accumulated that we're doing a tree-wide one-off update of the name & style. BRANCH=none BUG=chromium:1098010 TEST=`repo upload` works Change-Id: Icd3a1723c20595356af83d190b2c6a9078b3013b Signed-off-by: Mike Frysinger Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3891203 Reviewed-by: Jeremy Bettis Reviewed-by: Jack Rosenthal --- chip/stm32/dma-stm32f4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'chip/stm32/dma-stm32f4.c') diff --git a/chip/stm32/dma-stm32f4.c b/chip/stm32/dma-stm32f4.c index e817d6ad95..3121089437 100644 --- a/chip/stm32/dma-stm32f4.c +++ b/chip/stm32/dma-stm32f4.c @@ -1,4 +1,4 @@ -/* Copyright 2016 The Chromium OS Authors. All rights reserved. +/* Copyright 2016 The ChromiumOS Authors * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ -- cgit v1.2.1