From 049463f8ad985f9cb996caa7dbc5438383bd3084 Mon Sep 17 00:00:00 2001 From: Vic Yang Date: Wed, 4 Feb 2015 11:28:53 -0800 Subject: stm32: Add delay after enabling peripheral clock We need a dummy read after enabling AHB peripheral clock before we can access the peripheral. For APB, we also need a dummy read for STM32F3. BRANCH=All affected BUG=chrome-os-partner:33007 TEST=make buildall Change-Id: I47f4a024dca294f555428c3f2053c1d32835ebe0 Signed-off-by: Vic Yang Reviewed-on: https://chromium-review.googlesource.com/246181 Reviewed-by: Alec Berg Reviewed-by: Randall Spangler Tested-by: Vic Yang Commit-Queue: Vic Yang --- chip/stm32/gpio-stm32f0.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'chip/stm32/gpio-stm32f0.c') diff --git a/chip/stm32/gpio-stm32f0.c b/chip/stm32/gpio-stm32f0.c index 58a28a25f1..5418399595 100644 --- a/chip/stm32/gpio-stm32f0.c +++ b/chip/stm32/gpio-stm32f0.c @@ -5,6 +5,7 @@ /* GPIO module for Chrome EC */ +#include "clock.h" #include "common.h" #include "gpio.h" #include "hooks.h" @@ -26,6 +27,9 @@ void gpio_enable_clocks(void) * and support disabling some of them in low-power idle. */ STM32_RCC_AHBENR |= 0x7e0000; + + /* Delay 1 AHB clock cycle after the clock is enabled */ + clock_wait_bus_cycles(BUS_AHB, 1); } static void gpio_init(void) -- cgit v1.2.1