From 48b2edf031bde5ac628731f2f5846b53ad03aae8 Mon Sep 17 00:00:00 2001 From: Chris Zhong Date: Tue, 9 Dec 2014 14:10:36 +0800 Subject: stm32f0/i2c: adjust the 100kHz setting to never go above 100kHz STM32 seems to actually measure the rising and falling time of the I2C clock, so if one uses a really small resistor the timing will go faster than with a bigger resistor. This commit makes it so the I2C frequency is limited to max 100kHz (respecting the spec) no matter what size resistor (essentially we assume 0 rise and fall times). While this will make stuff slower on boards with big resistors (where they might have been under 100kHz anyway) this is the best compromise (since the spec does not specify min frequency) without getting config defines for the fall/rise times. The TSCLH of some boards would be too short with the recommended timing settings from spec, so increases the TSCLH would be better for everyone. This patch does not touch the higher frequencies since the rise and fall times do contribute a lot more to clocks, if the same method was used for those frequencies, the speeds would have to be a lot slower. BUG=chrome-os-partner:34375 BRANCH=None TEST=on any EC, note how frequency does not go above 100kHz TEST=As per tSCL = tSYNC1 + tSYNC2 + { [(SCLH+1) + (SCLL+1)] x (PRESC+1) x tI2CCLK } from datasheet Change-Id: Ibbeecac7f3da1b22d2ba3bca29ee3c17bfe997f5 Signed-off-by: Chris Zhong Signed-off-by: Alexandru M Stan Reviewed-on: https://chromium-review.googlesource.com/234077 Reviewed-by: Randall Spangler --- chip/stm32/i2c-stm32f0.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'chip/stm32/i2c-stm32f0.c') diff --git a/chip/stm32/i2c-stm32f0.c b/chip/stm32/i2c-stm32f0.c index 01e3269263..28726307ef 100644 --- a/chip/stm32/i2c-stm32f0.c +++ b/chip/stm32/i2c-stm32f0.c @@ -82,11 +82,11 @@ static void i2c_set_freq_port(const struct i2c_port_t *p) STM32_I2C_TIMINGR(port) = 0x50330309; break; case 100: - STM32_I2C_TIMINGR(port) = 0xB0420F13; + STM32_I2C_TIMINGR(port) = 0xB0421214; break; default: /* unknown speed, defaults to 100kBps */ CPRINTS("I2C bad speed %d kBps", p->kbps); - STM32_I2C_TIMINGR(port) = 0xB0420F13; + STM32_I2C_TIMINGR(port) = 0xB0421214; } /* Enable port */ STM32_I2C_CR1(port) = STM32_I2C_CR1_PE; -- cgit v1.2.1