From dea20bc5f83286287abfd3c219391f44a2e5122a Mon Sep 17 00:00:00 2001 From: Scott Collyer Date: Mon, 27 Jul 2020 18:30:24 -0700 Subject: stm32g4: Fix issue with APB1 base address The initial version of this file had a cut/paste error. Fixing the base address for APB1 bus BUG=148493929 BRANCH=None TEST=make BOARD=quiche is successful Signed-off-by: Scott Collyer Change-Id: I5c2abc0342bde4a66f166f87971617110c5acfd5 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/2324403 Reviewed-by: Daisuke Nojiri Commit-Queue: Scott Collyer Tested-by: Scott Collyer --- chip/stm32/registers-stm32g4.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'chip/stm32/registers-stm32g4.h') diff --git a/chip/stm32/registers-stm32g4.h b/chip/stm32/registers-stm32g4.h index 4d0b09c7be..ee7fd7e7ea 100644 --- a/chip/stm32/registers-stm32g4.h +++ b/chip/stm32/registers-stm32g4.h @@ -117,7 +117,7 @@ /* Peripheral base addresses */ #define STM32_PERIPH_BASE (0x40000000UL) /* Peripheral memory map */ -#define STM32_APB2PERIPH_BASE (STM32_PERIPH_BASE + 0x00000000UL) +#define STM32_APB1PERIPH_BASE (STM32_PERIPH_BASE + 0x00000000UL) #define STM32_APB2PERIPH_BASE (STM32_PERIPH_BASE + 0x00010000UL) #define STM32_AHB1PERIPH_BASE (STM32_PERIPH_BASE + 0x00020000UL) #define STM32_AHB2PERIPH_BASE (STM32_PERIPH_BASE + 0x08000000UL) -- cgit v1.2.1