From 7aab81edce830e15134b52256ad3186e08951b10 Mon Sep 17 00:00:00 2001 From: Vincent Palatin Date: Thu, 6 Mar 2014 16:02:58 -0800 Subject: force the compiler to use a valid register allocation for irq handlers When we are calling the re-scheduling routine at the end of an irq handling routine, we need to ensure that the high registers are not currently saved on the system stack. On Cortex-M3/M4, the compiler is normally doing tail-call optimization there and behaving properly, but this fixes the fact that insanely large interrupt handling routines where sometimes not compile and not running properly (aka issue 24515). This also prepares for one more core-specific DECLARE_IRQ routine on Cortex-M0. Note: now on, the IRQ handling routines should no longer be "static". Signed-off-by: Vincent Palatin BRANCH=none BUG=chrome-os-partner:24515 TEST=make -j buildall revert the workaround for 24515, see the issue happening only without this CL. Change-Id: Ic419369231925568df05815fd079ed191a5446db Reviewed-on: https://chromium-review.googlesource.com/189153 Reviewed-by: Vic Yang Reviewed-by: Randall Spangler Commit-Queue: Vincent Palatin Tested-by: Vincent Palatin --- chip/stm32/uart.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'chip/stm32/uart.c') diff --git a/chip/stm32/uart.c b/chip/stm32/uart.c index 5e21a128d4..4fe1214934 100644 --- a/chip/stm32/uart.c +++ b/chip/stm32/uart.c @@ -149,7 +149,7 @@ void uart_enable_interrupt(void) } /* Interrupt handler for console USART */ -static void uart_interrupt(void) +void uart_interrupt(void) { #ifdef CONFIG_UART_TX_DMA /* Disable transmission complete interrupt if DMA done */ -- cgit v1.2.1