From 55aee3888af07bedaacbcc5c345bad342c22457e Mon Sep 17 00:00:00 2001 From: Vincent Palatin Date: Wed, 9 Jul 2014 10:18:11 -0700 Subject: cortex-m0: add 64-bit multiplication Import code to do 64-bit multiplication on Cortex-M0 core without SMULL instruction. Signed-off-by: Vincent Palatin BRANCH=none BUG=none TEST=make buildall add a 64-bit multiplication and see it compiled properly. verify in .map files that the code is discarded for cortex-M0 based platforms not using the 64-bit multiplication. Change-Id: I0a91b3502f4bee4bb79b193fe0854e56a7d498f7 Reviewed-on: https://chromium-review.googlesource.com/207132 Reviewed-by: Randall Spangler Tested-by: Vincent Palatin Commit-Queue: Vincent Palatin --- core/cortex-m0/build.mk | 2 +- core/cortex-m0/lmul.S | 74 +++++++++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 75 insertions(+), 1 deletion(-) create mode 100644 core/cortex-m0/lmul.S (limited to 'core') diff --git a/core/cortex-m0/build.mk b/core/cortex-m0/build.mk index 9b5d63bb4d..13cef2efc2 100644 --- a/core/cortex-m0/build.mk +++ b/core/cortex-m0/build.mk @@ -13,7 +13,7 @@ CROSS_COMPILE?=arm-none-eabi- CFLAGS_CPU+=-mthumb -Os -mno-sched-prolog CFLAGS_CPU+=-mno-unaligned-access -core-y=cpu.o init.o thumb_case.o div.o +core-y=cpu.o init.o thumb_case.o div.o lmul.o core-$(CONFIG_COMMON_PANIC_OUTPUT)+=panic.o core-$(CONFIG_COMMON_RUNTIME)+=switch.o task.o core-$(CONFIG_WATCHDOG)+=watchdog.o diff --git a/core/cortex-m0/lmul.S b/core/cortex-m0/lmul.S new file mode 100644 index 0000000000..1e037a1ede --- /dev/null +++ b/core/cortex-m0/lmul.S @@ -0,0 +1,74 @@ +/* Runtime ABI for the ARM Cortex-M0 + * lmul.S: 64 bit multiplication + * + * Copyright (c) 2013 Jörg Mische + * + * Permission to use, copy, modify, and/or distribute this software for any + * purpose with or without fee is hereby granted, provided that the above + * copyright notice and this permission notice appear in all copies. + * + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT + * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. + */ + + + + .syntax unified + .text + .thumb + .cpu cortex-m0 + + + +@ long long __muldi3(long long, long long) +@ +@ libgcc wrapper: just an alias for __aeabi_lmul() +@ + .thumb_func + .global __muldi3 +__muldi3: + + + +@ long long __aeabi_lmul(long long r1:r0, long long r3:r2) +@ +@ Multiply r1:r0 and r3:r2 and return the product in r1:r0 +@ Can also be used for unsigned long product +@ + .thumb_func + .global __aeabi_lmul +__aeabi_lmul: + + push {r4, lr} + muls r1, r2 + muls r3, r0 + adds r1, r3 + + lsrs r3, r0, #16 + lsrs r4, r2, #16 + muls r3, r4 + adds r1, r3 + + lsrs r3, r0, #16 + uxth r0, r0 + uxth r2, r2 + muls r3, r2 + muls r4, r0 + muls r0, r2 + + movs r2, #0 + adds r3, r4 + adcs r2, r2 + lsls r2, #16 + adds r1, r2 + + lsls r2, r3, #16 + lsrs r3, #16 + adds r0, r2 + adcs r1, r3 + pop {r4, pc} -- cgit v1.2.1