From feafc75579f79c372d470fea5c1c076d0ed7f673 Mon Sep 17 00:00:00 2001 From: Sue Chen Date: Thu, 29 Jul 2021 11:39:02 +0800 Subject: ps8xxx: patch ps8805 A3 chip Device ID Add config option for the ps8805 to override the TCPCI Device ID field based on the page 0 register 0x62 bit 7-4. A2 chip: reg 0x62 bit7-4 = 0x0 A3 chip: reg 0x62 bit7-4 = 0xA BUG=b:193099851 BRANCH=trogdor TEST=ectool pdchipinfo can show overridden DID for both A2 and A3 chip on Lazor DUTs Signed-off-by: Sue Chen Change-Id: I99767c92a97c2fcefd3bbe03e3cd2b90de192ff3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3056225 Reviewed-by: Wai-Hong Tam --- driver/tcpm/ps8xxx.c | 36 ++++++++++++++++++++++++++++++++++++ driver/tcpm/ps8xxx.h | 7 +++++++ 2 files changed, 43 insertions(+) (limited to 'driver/tcpm') diff --git a/driver/tcpm/ps8xxx.c b/driver/tcpm/ps8xxx.c index 570b002a1c..96800d9983 100644 --- a/driver/tcpm/ps8xxx.c +++ b/driver/tcpm/ps8xxx.c @@ -498,6 +498,33 @@ static int ps8xxx_tcpc_drp_toggle(int port) } #endif +#ifdef CONFIG_USB_PD_TCPM_PS8805_FORCE_DID +static int ps8805_make_device_id(int port, int *id) +{ + int p0_addr; + int val; + int status; + + p0_addr = PS8751_P3_TO_P0_FLAGS(tcpc_config[port].i2c_info.addr_flags); + + status = tcpc_addr_read(port, p0_addr, PS8805_P0_REG_CHIP_REVISION, + &val); + if (status != EC_SUCCESS) + return status; + switch (val & 0xF0) { + case 0x00: /* A2 chip */ + *id = 1; + break; + case 0xa0: /* A3 chip */ + *id = 2; + break; + default: + return EC_ERROR_UNKNOWN; + } + return EC_SUCCESS; +} +#endif + #ifdef CONFIG_USB_PD_TCPM_PS8815_FORCE_DID /* * Early ps8815 A1 firmware reports 0x0001 in the TCPCI Device ID @@ -560,6 +587,15 @@ static int ps8xxx_get_chip_info(int port, int live, if (chip_info->fw_version_number == 0 || chip_info->fw_version_number == -1 || live) { +#ifdef CONFIG_USB_PD_TCPM_PS8805_FORCE_DID + if (chip_info->product_id == PS8805_PRODUCT_ID && + chip_info->device_id == 0x0001) { + rv = ps8805_make_device_id(port, &val); + if (rv != EC_SUCCESS) + return rv; + chip_info->device_id = val; + } +#endif #ifdef CONFIG_USB_PD_TCPM_PS8815_FORCE_DID if (chip_info->product_id == PS8815_PRODUCT_ID && chip_info->device_id == 0x0001) { diff --git a/driver/tcpm/ps8xxx.h b/driver/tcpm/ps8xxx.h index 573fffba70..b27946dc1e 100644 --- a/driver/tcpm/ps8xxx.h +++ b/driver/tcpm/ps8xxx.h @@ -11,6 +11,7 @@ #ifndef __CROS_EC_USB_PD_TCPM_PS8XXX_H #define __CROS_EC_USB_PD_TCPM_PS8XXX_H +#define PS8751_P3_TO_P0_FLAGS(p3_flags) ((p3_flags) - 3) #define PS8751_P3_TO_P1_FLAGS(p3_flags) ((p3_flags) - 2) #define PS8751_BIST_TIMER_FREQ 15000000 @@ -79,6 +80,12 @@ #define PS8815_REG_DP_EQ_COMP_SHIFT 3 #define PS8815_AUX_INTERCEPTION_DISABLE BIT(1) +/* + * PS8805 register to distinguish chip revision + * bit 7-4: 1010b is A3 chip, 0000b is A2 chip + */ +#define PS8805_P0_REG_CHIP_REVISION 0x62 + /* * PS8805 GPIO control register. Note the device I2C address of 0x1A is * independent of the ADDR pin on the chip, and not the same address being used -- cgit v1.2.1