From 1d6c7bb9773f76aa70ce65822fa001ff72892cd2 Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Thu, 28 Feb 2019 20:05:27 -0800 Subject: nvmem: test modifications to support the new scheme This patch includes changes to support testing of the new nvmem implementation. Making fizz compatible required duplicating a lot of functionality available in the test/ directory (fuzz/nvmem_tpm2_mock.c is very similar to test/nvmem_tpm2_mock.c), but I could not find an easy way to avoid it. BRANCH=cr50, cr50-mp BUG=b:69907320, b:129710256 CQ-DEPEND=CL:1496607 TEST=with the rest of the patches applied 'make buildall -j' succeeds, which confirms both test and fuzz success. Change-Id: Ife999b04d22f8ddbe9ea5d35f4c3e21f57592754 Signed-off-by: Vadim Bendebury Reviewed-on: https://chromium-review.googlesource.com/1450278 Reviewed-by: Andrey Pronin --- fuzz/fuzz_config.h | 23 +++++++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) (limited to 'fuzz/fuzz_config.h') diff --git a/fuzz/fuzz_config.h b/fuzz/fuzz_config.h index 362df69c56..dd2cdc5ae9 100644 --- a/fuzz/fuzz_config.h +++ b/fuzz/fuzz_config.h @@ -17,6 +17,7 @@ #define CONFIG_PINWEAVER #define CONFIG_UPTO_SHA512 #define SHA512_SUPPORT +#define CONFIG_MALLOC /******************************************************************************/ /* From chip/g/config_chip.h */ @@ -29,6 +30,11 @@ /******************************************************************************/ /* From board/cr50/board.h */ /* Non-volatile counter storage for U2F */ +#define CONFIG_CRC8 +#define CONFIG_FLASH_ERASED_VALUE32 (-1U) +#define CONFIG_FLASH_LOG +#define CONFIG_FLASH_LOG_BASE CONFIG_PROGRAM_MEMORY_BASE +#define CONFIG_FLASH_LOG_SPACE 0x800 #define CONFIG_FLASH_NVCOUNTER #define CONFIG_FLASH_NVCTR_SIZE CONFIG_FLASH_BANK_SIZE #define CONFIG_FLASH_NVCTR_BASE_A (CONFIG_PROGRAM_MEMORY_BASE + \ @@ -41,14 +47,23 @@ #define CONFIG_FLASH_NVMEM_OFFSET_A (CFG_TOP_A_OFF + CONFIG_FLASH_NVCTR_SIZE) #define CONFIG_FLASH_NVMEM_OFFSET_B (CFG_TOP_B_OFF + CONFIG_FLASH_NVCTR_SIZE) /* Address of start of Nvmem area */ -#define CONFIG_FLASH_NVMEM_BASE_A (CONFIG_PROGRAM_MEMORY_BASE + \ - CONFIG_FLASH_NVMEM_OFFSET_A) -#define CONFIG_FLASH_NVMEM_BASE_B (CONFIG_PROGRAM_MEMORY_BASE + \ - CONFIG_FLASH_NVMEM_OFFSET_B) +#define CONFIG_FLASH_NVMEM_BASE_A \ + (CONFIG_PROGRAM_MEMORY_BASE + CONFIG_FLASH_NVMEM_OFFSET_A) +#define CONFIG_FLASH_NVMEM_BASE_B \ + (CONFIG_PROGRAM_MEMORY_BASE + CONFIG_FLASH_NVMEM_OFFSET_B) +#define CONFIG_FLASH_NEW_NVMEM_BASE_A \ + (CONFIG_FLASH_NVMEM_BASE_A + CONFIG_FLASH_BANK_SIZE) +#define CONFIG_FLASH_NEW_NVMEM_BASE_B \ + (CONFIG_FLASH_NVMEM_BASE_B + CONFIG_FLASH_BANK_SIZE) /* Size partition in NvMem */ #define NVMEM_PARTITION_SIZE (CFG_TOP_SIZE - CONFIG_FLASH_NVCTR_SIZE) /* Size in bytes of NvMem area */ #define CONFIG_FLASH_NVMEM_SIZE (NVMEM_PARTITION_SIZE * NVMEM_NUM_PARTITIONS) + +#define NEW_NVMEM_PARTITION_SIZE (NVMEM_PARTITION_SIZE - CONFIG_FLASH_BANK_SIZE) +#define NEW_NVMEM_TOTAL_PAGES \ + (2 * NEW_NVMEM_PARTITION_SIZE / CONFIG_FLASH_BANK_SIZE) + /* Enable variable support. */ #define CONFIG_FLASH_NVMEM_VARS #define NVMEM_CR50_SIZE 272 -- cgit v1.2.1