From 200542008dca0aba2490e9993333be430b5fda6f Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Wed, 27 Apr 2022 11:22:01 -0600 Subject: treewide: Convert ESPI_DEFAULT_SCI_WIDTH_US to default VWIRE pulse width In the corresponding bug, Intel has clarified that this SCI# pulse length requirement is actually for all virtual wires, therefore this patch renames CONFIG_ESPI_DEFAULT_SCI_WIDTH_US to CONFIG_ESPI_DEFAULT_VW_WIDTH_US to reflect its broader purpose. All pulses of virtual wire signals were converted to use this new pulse width config option, and all GPIO pulses were converted back to their original value (65 us). BUG=b:227367177 BRANCH=brya TEST=build Signed-off-by: Tim Wawrzynczak Change-Id: I1225b3e436cd1dca71c93500538a201d008781b3 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/3610694 Reviewed-by: Keith Short Reviewed-by: caveh jalali --- include/config.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'include') diff --git a/include/config.h b/include/config.h index 7582656392..478e6dc708 100644 --- a/include/config.h +++ b/include/config.h @@ -5666,7 +5666,7 @@ * The historical default SCI pulse width to the host is 65 microseconds, but * some chipsets may require different widths. */ -#define CONFIG_ESPI_DEFAULT_SCI_WIDTH_US 65 +#define CONFIG_ESPI_DEFAULT_VW_WIDTH_US 65 /*****************************************************************************/ /* -- cgit v1.2.1