From 0348eb1059cd4fa43b8426013314f76ac201bd7a Mon Sep 17 00:00:00 2001
From: Shamile Khan <shamile.khan@intel.com>
Date: Wed, 25 Oct 2017 12:53:13 -0700
Subject: glkrvp: Enable eSPI instead of LPC including eSPI VW based SCI/SMI

BUG=None
BRANCH=None
TEST=GLKRVP can boot to OS when a coreboot image with eSPI
     enabled is flashed.

Change-Id: Ia534bdbbe517c53ba2e0beafc41b421872f1e33d
Signed-off-by: Shamile Khan <shamile.khan@intel.com>
Reviewed-on: https://chromium-review.googlesource.com/818196
Commit-Ready: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Vijay P Hiremath <vijay.p.hiremath@intel.com>
Reviewed-by: Shawn N <shawnn@chromium.org>
---
 power/apollolake.c | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'power')

diff --git a/power/apollolake.c b/power/apollolake.c
index c3ca7f55f5..feecd24f8e 100644
--- a/power/apollolake.c
+++ b/power/apollolake.c
@@ -42,6 +42,10 @@ enum power_state chipset_force_g3(void)
 	return POWER_G3;
 }
 
+void chipset_handle_espi_reset_assert(void)
+{
+}
+
 void chipset_reset(int cold_reset)
 {
 	CPRINTS("%s(%d)", __func__, cold_reset);
-- 
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