From c8af732351cc5c7167f27e8390e26f0556f53a5a Mon Sep 17 00:00:00 2001 From: YH Lin Date: Sat, 3 Dec 2022 00:19:30 +0000 Subject: Revert "Merge remote-tracking branch cros/main into factory-brya-14517.B-main" This reverts commit af25602b15b22b9ef5821dcba9934311f2157c48. Reason for revert: broken build due to ec-utils. Original change's description: > Merge remote-tracking branch cros/main into factory-brya-14517.B-main > > Generated by: util/update_release_branch.py --baseboard brya --relevant_paths_file > baseboard/brya/relevant-paths.txt factory-brya-14517.B-main > > Relevant changes: > > git log --oneline 54462f034b..aa40b859b3 -- baseboard/brya board/agah > board/anahera board/banshee board/brya board/crota board/felwinter > board/gimble board/kano board/mithrax board/osiris board/primus > board/redrix board/taeko board/taniks board/vell board/volmar > driver/bc12/pi3usb9201_public.* driver/charger/bq25710.* > driver/ppc/nx20p348x.* driver/ppc/syv682x_public.* > driver/retimer/bb_retimer_public.* driver/tcpm/nct38xx.* > driver/tcpm/ps8xxx_public.* driver/tcpm/tcpci.* include/power/alderlake* > include/intel_x86.h power/alderlake* power/intel_x86.c > util/getversion.sh > > e6da633c38 driver: Sort header files > 234a87ae2d tcpci: Add FRS enable to driver structure > a56be59ccd tcpm_header: add test for tcpm_dump_registers > 57b3256963 Rename CONFIG_CHARGER_INPUT_CURRENT to _CHARGER_DEFAULT_CURRENT_LIMIT > e420c8ff9a marasov: Modify TypeC and TypeA configuration. > 43b53e0045 Add default implementation of board_set_charge_limit > b75dc90677 Add CONFIG_CHARGER_MIN_INPUT_CURRENT_LIMIT > f1b563c350 baseboard: Sort header files > 7d01b1e58d driver/retimer/ps8818.h: Add I2C ADDR FLAGS 0x30, 0x58, 0x70 > ec31407993 Add CONFIG_CHARGER_INPUT_CURRENT_DERATE_PCT > 8f89f69a5b crota: disable lid angle sensor for clamshell > > BRANCH=None > BUG=b:259002141 b:255184961 b:247100970 b:259354679 b:260630630 > BUG=b:163093572 b:254328661 > TEST=`emerge-brya chromeos-ec` > > Force-Relevant-Builds: all > Change-Id: Ia85a701fbf6b8e67ec214b9e25e0e55e980a6f47 > Signed-off-by: YH Lin Bug: b:259002141 b:255184961 b:247100970 b:259354679 b:260630630 Bug: b:163093572 b:254328661 Change-Id: I48d5aa4cc67a69ee1f6ac9255ac3087d34da4c72 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/ec/+/4077248 Tested-by: YH Lin Commit-Queue: YH Lin Reviewed-by: Boris Mittelberg Auto-Submit: YH Lin --- zephyr/projects/herobrine/gpio_evoker.dts | 329 ++++++++++++++++++++++++++++++ 1 file changed, 329 insertions(+) create mode 100644 zephyr/projects/herobrine/gpio_evoker.dts (limited to 'zephyr/projects/herobrine/gpio_evoker.dts') diff --git a/zephyr/projects/herobrine/gpio_evoker.dts b/zephyr/projects/herobrine/gpio_evoker.dts new file mode 100644 index 0000000000..d60fdf93c7 --- /dev/null +++ b/zephyr/projects/herobrine/gpio_evoker.dts @@ -0,0 +1,329 @@ +/* Copyright 2022 The ChromiumOS Authors + * Use of this source code is governed by a BSD-style license that can be + * found in the LICENSE file. + */ + +/ { + aliases { + gpio-wp = &gpio_ec_wp_odl; + gpio-kbd-kso2 = &gpio_ec_kso_02_inv; + }; + + named-gpios { + compatible = "named-gpios"; + + gpio_usb_c0_pd_int_odl: usb_c0_pd_int_odl { + gpios = <&gpioe 0 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_PD_INT_ODL"; + }; + gpio_usb_c1_pd_int_odl: usb_c1_pd_int_odl { + gpios = <&gpiof 5 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_PD_INT_ODL"; + }; + gpio_usb_c0_swctl_int_odl: usb_c0_swctl_int_odl { + gpios = <&gpio0 3 GPIO_INPUT>; + enum-name = "GPIO_USB_C0_SWCTL_INT_ODL"; + }; + gpio_usb_c1_swctl_int_odl: usb_c1_swctl_int_odl { + gpios = <&gpio4 0 GPIO_INPUT>; + enum-name = "GPIO_USB_C1_SWCTL_INT_ODL"; + }; + gpio_usb_c0_bc12_int_l: usb_c0_bc12_int_l { + gpios = <&gpio6 1 GPIO_INPUT_PULL_UP>; + }; + gpio_usb_c1_bc12_int_l: usb_c1_bc12_int_l { + gpios = <&gpio8 2 GPIO_INPUT_PULL_UP>; + }; + gpio_usb_a0_oc_odl: usb_a0_oc_odl { + gpios = <&gpiof 4 GPIO_INPUT_PULL_UP>; + }; + gpio_chg_acok_od: chg_acok_od { + gpios = <&gpiod 2 GPIO_INPUT>; + enum-name = "GPIO_AC_PRESENT"; + }; + gpio_ec_pwr_btn_odl: ec_pwr_btn_odl { + gpios = <&gpio0 0 GPIO_INPUT>; + enum-name = "GPIO_POWER_BUTTON_L"; + }; + gpio_ec_voldn_btn_odl: ec_voldn_btn_odl { + gpios = <&gpio6 2 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_DOWN_L"; + }; + gpio_ec_volup_btn_odl: ec_volup_btn_odl { + gpios = <&gpioc 2 GPIO_INPUT_PULL_UP>; + enum-name = "GPIO_VOLUME_UP_L"; + }; + gpio_ec_wp_odl: ec_wp_odl { + gpios = <&gpiod 3 (GPIO_INPUT | GPIO_ACTIVE_LOW)>; + }; + gpio_lid_open_ec: lid_open_ec { + gpios = <&gpio0 1 GPIO_INPUT>; + enum-name = "GPIO_LID_OPEN"; + }; + gpio_ap_rst_l: ap_rst_l { + gpios = <&gpio5 1 GPIO_INPUT>; + enum-name = "GPIO_AP_RST_L"; + }; + gpio_ps_hold: ps_hold { + gpios = <&gpioa 6 GPIO_INPUT_PULL_DOWN>; + enum-name = "GPIO_PS_HOLD"; + }; + gpio_ap_suspend: ap_suspend { + gpios = <&gpio5 7 GPIO_INPUT>; + enum-name = "GPIO_AP_SUSPEND"; + }; + gpio_mb_power_good: mb_power_good { + gpios = <&gpio3 7 GPIO_INPUT_PULL_DOWN>; + enum-name = "GPIO_POWER_GOOD"; + }; + gpio_warm_reset_l: warm_reset_l { + gpios = <&gpiob 0 GPIO_INPUT>; + enum-name = "GPIO_WARM_RESET_L"; + }; + ap_ec_spi_cs_l { + gpios = <&gpio5 3 GPIO_INPUT_PULL_DOWN>; + }; + gpio_tablet_mode_l: tablet_mode_l { + gpios = <&gpioc 6 GPIO_INPUT>; + enum-name = "GPIO_TABLET_MODE_L"; + }; + gpio_accel_gyro_int_l: accel_gyro_int_l { + gpios = <&gpioa 3 GPIO_INPUT>; + }; + gpio_rtc_ec_wake_odl: rtc_ec_wake_odl { + gpios = <&gpio0 2 GPIO_INPUT>; + }; + ec_entering_rw { + gpios = <&gpio7 2 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_ENTERING_RW"; + }; + ccd_mode_odl { + gpios = <&gpio6 3 GPIO_INPUT>; + enum-name = "GPIO_CCD_MODE_ODL"; + }; + ec_batt_pres_odl { + gpios = <&gpioe 5 GPIO_INPUT>; + enum-name = "GPIO_BATT_PRES_ODL"; + }; + ec_gsc_packet_mode { + gpios = <&gpio8 3 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_PACKET_MODE_EN"; + }; + pmic_resin_l { + gpios = <&gpioa 0 GPIO_ODR_HIGH>; + enum-name = "GPIO_PMIC_RESIN_L"; + }; + pmic_kpd_pwr_odl { + gpios = <&gpioa 2 GPIO_ODR_HIGH>; + enum-name = "GPIO_PMIC_KPD_PWR_ODL"; + }; + ap_ec_int_l { + gpios = <&gpio5 6 GPIO_ODR_HIGH>; + enum-name = "GPIO_EC_INT_L"; + }; + gpio_switchcap_on: switchcap_on { + gpios = <&gpiod 5 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_SWITCHCAP_ON"; + }; + gpio_en_pp5000_s5: en_pp5000_s5 { + gpios = <&gpio7 3 GPIO_OUTPUT_HIGH>; + enum-name = "GPIO_EN_PP5000"; + }; + ec_bl_disable_l { + /* The PMIC controls backlight enable and this pin must + * be HiZ for normal operation. But the backlight can + * be enabled by setting this pin low and configuring it + * as an output. + */ + gpios = <&gpiob 6 GPIO_INPUT>; + enum-name = "GPIO_ENABLE_BACKLIGHT"; + }; + lid_accel_int_l { + gpios = <&gpioa 1 GPIO_INPUT>; + }; + tp_int_gate { + gpios = <&gpio7 4 GPIO_OUTPUT_LOW>; + }; + gpio_usb_c0_pd_rst_l: usb_c0_pd_rst_l { + gpios = <&gpiof 1 GPIO_OUTPUT_HIGH>; + }; + gpio_usb_c1_pd_rst_l: usb_c1_pd_rst_l { + gpios = <&gpioe 4 GPIO_OUTPUT_HIGH>; + }; + gpio_dp_mux_oe_l: dp_mux_oe_l { + gpios = <&gpiob 1 GPIO_ODR_HIGH>; + }; + gpio_dp_mux_sel: dp_mux_sel { + gpios = <&gpio4 5 GPIO_OUTPUT_LOW>; + }; + gpio_dp_hot_plug_det_r: dp_hot_plug_det_r { + gpios = <&gpio9 5 GPIO_OUTPUT_LOW>; + }; + gpio_en_usb_a_5v: en_usb_a_5v { + gpios = <&gpiof 0 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_EN_USB_A_5V"; + }; + usb_a_cdp_ilim_en_l { + gpios = <&gpio7 5 GPIO_OUTPUT_HIGH>; + }; + gpio_usb_c0_frs_en: usb_c0_frs_en { + gpios = <&gpioc 5 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_USB_C0_FRS_EN"; + }; + gpio_usb_c1_frs_en: usb_c1_frs_en { + gpios = <&gpioc 1 GPIO_OUTPUT_LOW>; + enum-name = "GPIO_USB_C1_FRS_EN"; + }; + gpio_ec_chg_led_y_c0: ec_chg_led_y_c0 { + #led-pin-cells = <1>; + gpios = <&gpio6 0 GPIO_OUTPUT_LOW>; + }; + gpio_ec_chg_led_w_c0: ec_chg_led_w_c0 { + #led-pin-cells = <1>; + gpios = <&gpioc 0 GPIO_OUTPUT_LOW>; + }; + gpio_ec_chg_led_w_c1: ec_chg_led_w_c1 { + #led-pin-cells = <1>; + gpios = <&gpioc 3 GPIO_OUTPUT_LOW>; + }; + gpio_ec_chg_led_r_c0: ec_chg_led_r_c0 { + #led-pin-cells = <1>; + gpios = <&gpioc 4 GPIO_OUTPUT_LOW>; + }; + ap_ec_spi_mosi { + gpios = <&gpio4 6 GPIO_INPUT_PULL_DOWN>; + }; + ap_ec_spi_miso { + gpios = <&gpio4 7 GPIO_INPUT_PULL_DOWN>; + }; + ap_ec_spi_clk { + gpios = <&gpio5 5 GPIO_INPUT_PULL_DOWN>; + }; + gpio_brd_id0: brd_id0 { + gpios = <&gpio9 4 GPIO_INPUT>; + enum-name = "GPIO_BOARD_VERSION1"; + }; + gpio_brd_id1: brd_id1 { + gpios = <&gpio9 7 GPIO_INPUT>; + enum-name = "GPIO_BOARD_VERSION2"; + }; + gpio_brd_id2: brd_id2 { + gpios = <&gpioa 5 GPIO_INPUT>; + enum-name = "GPIO_BOARD_VERSION3"; + }; + gpio_sku_id0: sku_id0 { + gpios = <&gpio6 7 GPIO_INPUT>; + }; + gpio_sku_id1: sku_id1 { + gpios = <&gpio7 0 GPIO_INPUT>; + }; + gpio_sku_id2: sku_id2 { + gpios = <&gpioe 1 GPIO_INPUT>; + }; + gpio_switchcap_pg: src_vph_pwr_pg { + gpios = <&gpioe 2 GPIO_INPUT_PULL_DOWN>; + enum-name = "GPIO_SWITCHCAP_PG"; + }; + arm_x86 { + gpios = <&gpio6 6 GPIO_OUTPUT_LOW>; + }; + ec-i2c-sensor-scl { + gpios = <&gpiob 3 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + ec-i2c-sensor-sda { + gpios = <&gpiob 2 (GPIO_INPUT | GPIO_VOLTAGE_1P8)>; + }; + gpio_ec_kso_02_inv: ec_kso_02_inv { + gpios = <&gpio1 7 (GPIO_OUTPUT_LOW | GPIO_ACTIVE_LOW)>; + }; + }; + + usba-port-enable-list { + compatible = "cros-ec,usba-port-enable-pins"; + enable-pins = <&gpio_en_usb_a_5v>; + }; + + sku { + compatible = "cros-ec,gpio-id"; + + bits = < + &gpio_sku_id0 + &gpio_sku_id1 + &gpio_sku_id2 + >; + + system = "ternary"; + }; + + board { + compatible = "cros-ec,gpio-id"; + + bits = < + &gpio_brd_id0 + &gpio_brd_id1 + &gpio_brd_id2 + >; + + system = "ternary"; + }; + + unused-pins { + compatible = "unused-gpios"; + unused-gpios = + <&gpio5 2 0>, + <&gpio5 4 0>, + <&gpio7 6 0>, + <&gpiod 1 0>, + <&gpiod 0 0>, + <&gpioe 3 0>, + <&gpio0 4 0>, + <&gpiod 6 0>, + <&gpio3 2 0>, + <&gpio3 5 0>, + <&gpiod 7 0>, + <&gpio8 6 0>, + <&gpiod 4 0>, + <&gpio4 1 0>, + <&gpio3 4 0>, + <&gpioc 7 0>, + <&gpioa 4 0>, + <&gpio9 6 0>, + <&gpio9 3 0>, + <&gpioa 7 0>, + <&gpio5 0 0>, + <&gpio8 1 0>, + <&gpiob 7 0>; + }; +}; + +/* Power switch logic input pads */ +&psl_in1_gpd2 { + /* ACOK_OD */ + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; +}; + +&psl_in2_gp00 { + /* EC_PWR_BTN_ODL */ + psl-in-mode = "edge"; + psl-in-pol = "low-falling"; +}; + +&psl_in3_gp01 { + /* LID_OPEN_EC */ + psl-in-mode = "edge"; + psl-in-pol = "high-rising"; +}; + +&psl_in4_gp02 { + /* RTC_EC_WAKE_ODL */ + psl-in-mode = "edge"; + psl-in-pol = "low-falling"; +}; + +/* Power domain device controlled by PSL (Power Switch Logic) IO pads */ +&power_ctrl_psl { + status = "okay"; + pinctrl-names = "sleep"; + pinctrl-0 = <&psl_in1_gpd2 &psl_in2_gp00 &psl_in3_gp01 &psl_in4_gp02>; +}; -- cgit v1.2.1