# Copyright 2021 The Chromium OS Authors. All rights reserved.
# Use of this source code is governed by a BSD-style license that can be
# found in the LICENSE file.

#
# This file defines the correct defaults when using the NPCX9 series chipset
#

if SOC_SERIES_NPCX9

#
# NPCX993F: 512 KiB Flash, 256 KiB code RAM, 64 KiB data RAM
# NPCX996F: 512 KiB Flash, 192 KiB code RAM, 64 KiB data RAM
#

# Code RAM base for NPCX9 series
config CROS_EC_PROGRAM_MEMORY_BASE
	default 0x10080000 if SOC_NPCX9M3F
	default 0x10090000 if SOC_NPCX9M6F

config CROS_EC_RAM_BASE
	default 0x200c0000

config CROS_EC_DATA_RAM_SIZE
	default 0x0000f800

config CROS_EC_RAM_SIZE
	default 0x0000f800

config FLASH_SIZE
	default 512

config CROS_EC_RO_MEM_OFF
	default 0x0

# NPCX993F: Image size limited by 1/2 Flash size (256 KiB) and
#           code RAM size (256 KiB)
# NPCX996F: Image size limited by code RAM size (192 KiB)

config CROS_EC_RO_SIZE
	default 0x40000 if SOC_NPCX9M3F
	default 0x30000 if SOC_NPCX9M6F

config CROS_EC_RW_MEM_OFF
	default 0x0

config CROS_EC_RW_SIZE
	default 0x40000 if SOC_NPCX9M3F
	default 0x30000 if SOC_NPCX9M6F

endif # SOC_SERIES_NPCX9