/* Copyright 2022 The Chromium OS Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ #include / { aliases { gpio-cbi-wp = &gpio_ec_cbi_wp; gpio-wp = &gpio_ec_wp_odl; int-wp = &int_wp_l; gpio-kbd-kso2 = &gpio_ec_kso_02_inv; }; ec-console { compatible = "ec-console"; disabled = "events", "lpc", "hostcmd"; }; batteries { default_battery: lgc { compatible = "lgc,ap18c8k", "battery-smart"; }; }; hibernate-wake-pins { compatible = "cros-ec,hibernate-wake-pins"; wakeup-irqs = < &int_power_button &int_lid_open >; }; gpio-interrupts { compatible = "cros-ec,gpio-interrupts"; int_power_button: power_button { irq-pin = <&gpio_gsc_ec_pwr_btn_odl>; flags = ; handler = "power_button_interrupt"; }; int_wp_l: wp_l { irq-pin = <&gpio_ec_wp_odl>; flags = ; handler = "switch_interrupt"; }; int_lid_open: lid_open { irq-pin = <&gpio_lid_open>; flags = ; handler = "lid_interrupt"; }; int_tablet_mode: tablet_mode { irq-pin = <&gpio_tablet_mode_l>; flags = ; handler = "gmr_tablet_switch_isr"; }; int_imu: ec_imu { irq-pin = <&gpio_imu_int_l>; flags = ; handler = "lsm6dso_interrupt"; }; int_vol_down: vol_down { irq-pin = <&gpio_voldn_btn_odl>; flags = ; handler = "button_interrupt"; }; int_vol_up: vol_up { irq-pin = <&gpio_volup_btn_odl>; flags = ; handler = "button_interrupt"; }; int_usb_c0: usb_c0 { irq-pin = <&gpio_usb_c0_int_odl>; flags = ; handler = "usb_interrupt"; }; int_usb_c1: usb_c1 { irq-pin = <&gpio_sb_1>; flags = ; handler = "usb_interrupt"; }; }; named-gpios { gpio_sb_1: sb_1 { gpios = <&gpio0 2 GPIO_PULL_UP>; no-auto-init; }; gpio_sb_2: sb_2 { gpios = <&gpiod 4 GPIO_OUTPUT>; no-auto-init; }; gpio_sb_3: sb_3 { gpios = <&gpiof 4 GPIO_OPEN_DRAIN>; no-auto-init; }; gpio_sb_4: sb_4 { gpios = <&gpiof 5 GPIO_INPUT>; no-auto-init; }; }; /* * Aliases used for sub-board GPIOs. */ aliases { /* * Input GPIO when used with type-C port 1 * Output when used with HDMI sub-board */ gpio-usb-c1-int-odl = &gpio_sb_1; gpio-en-rails-odl = &gpio_sb_1; /* * Sub-board with type A USB, enable. */ gpio-en-usb-a1-vbus = &gpio_sb_2; /* * HPD pins for HDMI sub-board. */ gpio-hdmi-en-odl = &gpio_sb_3; gpio-hpd-odl = &gpio_sb_4; /* * Enable S5 rails for LTE sub-board */ gpio-en-sub-s5-rails = &gpio_sb_2; }; named-temp-sensors { memory { compatible = "cros-ec,temp-sensor-thermistor", "cros-ec,temp-sensor"; thermistor = <&thermistor_3V3_51K1_47K_4050B>; label = "DDR and SOC"; enum-name = "TEMP_SENSOR_1"; temp_fan_off = <35>; temp_fan_max = <60>; temp_host_high = <85>; temp_host_halt = <90>; temp_host_release_high = <80>; adc = <&adc_temp_sensor_1>; }; charger { compatible = "cros-ec,temp-sensor-thermistor", "cros-ec,temp-sensor"; thermistor = <&thermistor_3V3_51K1_47K_4050B>; label = "Charger"; enum-name = "TEMP_SENSOR_2"; temp_fan_off = <35>; temp_fan_max = <60>; temp_host_high = <85>; temp_host_halt = <90>; temp_host_release_high = <80>; adc = <&adc_temp_sensor_2>; }; }; usba { compatible = "cros-ec,usba-port-enable-pins"; /* * sb_2 is only configured as GPIO when USB-A1 is present, * but it's still safe to control when disabled. * * ILIM_SEL pins are referred to by legacy enum name, * GPIO_USB*_ILIM_SEL. The one for port A1 is unused on * sub-boards that don't have USB-A so is safe to control * regardless of system configuration. */ enable-pins = <&gpio_en_usb_a0_vbus &gpio_sb_2>; status = "okay"; }; usbc { #address-cells = <1>; #size-cells = <0>; port0@0 { compatible = "named-usbc-port"; reg = <0>; bc12 { compatible = "pericom,pi3usb9201"; port = <&i2c_ec_i2c_usb_c0>; /* * BC1.2 interrupt is shared with TCPC, so * IRQ is not specified here and handled by * usb_c0_interrupt. */ }; chg { compatible = "intersil,isl923x"; status = "okay"; port = <&i2c_ec_i2c_usb_c0>; }; usb-muxes = <&virtual_mux_0>; }; port0-muxes { virtual_mux_0: virtual-mux-0 { compatible = "cros-ec,usbc-mux-virtual"; }; }; /* * TODO(b:211693800): port1 may not be present on some * sub-boards. */ port1@1 { compatible = "named-usbc-port"; reg = <1>; bc12 { compatible = "pericom,pi3usb9201"; port = <&i2c_ec_i2c_sub_usb_c1>; }; chg { compatible = "intersil,isl923x"; status = "okay"; port = <&i2c_ec_i2c_sub_usb_c1>; }; /* * Some sub-boards may disable all usb muxes in chain * except virtual_mux_1 */ usb-muxes = <&virtual_mux_1 &anx7483_mux_1>; }; port1-muxes { virtual_mux_1: virtual-mux-1 { compatible = "cros-ec,usbc-mux-virtual"; }; anx7483_mux_1: anx7483-mux-1 { compatible = "analogix,anx7483"; port = <&i2c_ec_i2c_sub_usb_c1>; i2c-addr-flags = "ANX7483_I2C_ADDR0_FLAGS"; }; }; }; kblight { compatible = "cros-ec,kblight-pwm"; pwms = <&pwm6 6 0 PWM_POLARITY_NORMAL>; frequency = <10000>; }; /* * Set I2C pins for type C sub-board to be * low voltage (I2C5_1). * We do this for all boards, since the pins are * 3.3V tolerant, and the only 2 types of sub-boards * used on nivviks both have type-C ports on them. */ def-lvol-io-list { compatible = "nuvoton,npcx-lvolctrl-def"; lvol-io-pads = <&lvol_iof5 &lvol_iof4>; }; }; &thermistor_3V3_51K1_47K_4050B { status = "okay"; }; &adc_ec_vsense_pp3300_s5 { /* * Voltage divider on input has 47k upper and 220k lower legs with * 2714 mV full-scale reading on the ADC. Apply the largest possible * multiplier (without overflowing int32) to get the best possible * approximation of the actual ratio, but derate by a factor of two to * ensure unexpectedly high values won't overflow. */ mul = <(791261 / 2)>; div = <(651975 / 2)>; }; /* Set bus speeds for I2C */ &i2c0_0 { label = "I2C_EEPROM"; clock-frequency = ; cbi_eeprom: eeprom@50 { compatible = "atmel,at24"; reg = <0x50>; label = "EEPROM_CBI"; size = <2048>; pagesize = <16>; address-width = <8>; timeout = <5>; }; }; &i2c1_0 { label = "I2C_SENSOR"; clock-frequency = ; }; &i2c3_0 { label = "I2C_USB_C0_TCPC"; clock-frequency = ; }; &i2c5_1 { label = "I2C_SUB_C1_TCPC"; clock-frequency = ; }; &i2c7_0 { label = "I2C_BATTERY"; clock-frequency = ; }; &pwm6 { status = "okay"; pinctrl-0 = <&pwm6_gpc0>; pinctrl-names = "default"; }; /* host interface */ &espi0 { status = "okay"; pinctrl-0 = <&espi_lpc_gp46_47_51_52_53_54_55_57>; pinctrl-names = "default"; };