/* Copyright 2021 The Chromium OS Authors. All rights reserved. * Use of this source code is governed by a BSD-style license that can be * found in the LICENSE file. */ / { /* GPIOs shared by all boards */ named-gpios { compatible = "named-gpios"; ccd_mode_odl { gpios = <&gpioc 6 GPIO_ODR_HIGH>; }; ec_gsc_packet_mode { gpios = <&gpiob 1 GPIO_OUT_LOW>; enum-name = "GPIO_PACKET_MODE_EN"; }; gpio_mech_pwr_btn_odl: mech_pwr_btn_odl { gpios = <&gpiod 2 GPIO_INPUT>; enum-name = "GPIO_POWER_BUTTON_L"; }; gpio_slp_s3_l: slp_s3_l { gpios = <&gpio6 1 GPIO_INPUT>; enum-name = "GPIO_PCH_SLP_S3_L"; }; gpio_slp_s5_l: slp_s5_l { gpios = <&gpio7 2 GPIO_INPUT>; enum-name = "GPIO_PCH_SLP_S5_L"; }; gpio_pg_pwr_s5: pg_pwr_s5 { gpios = <&gpioc 0 GPIO_INPUT>; enum-name = "GPIO_S5_PGOOD"; }; gpio_s0_pgood: pg_pcore_s0_r_od { gpios = <&gpiob 6 GPIO_INPUT>; enum-name = "GPIO_S0_PGOOD"; }; gpio_acok_od: acok_od { gpios = <&gpio0 0 GPIO_INPUT>; enum-name = "GPIO_AC_PRESENT"; }; en_pwr_s5 { gpios = <&gpiob 7 GPIO_OUT_LOW>; enum-name = "GPIO_EN_PWR_A"; }; gpio_en_pwr_s0_r: en_pwr_s0_r { gpios = <&gpiof 1 GPIO_OUT_LOW>; }; gpio_en_pwr_pcore_s0_r: en_pwr_pcore_s0_r { gpios = <&gpioe 1 GPIO_OUT_LOW>; }; ec_sys_rst_l { gpios = <&gpio7 6 GPIO_ODR_HIGH>; enum-name = "GPIO_SYS_RESET_L"; }; gpio_ec_soc_rsmrst_l: ec_soc_rsmrst_l { gpios = <&gpioc 5 GPIO_OUT_LOW>; enum-name = "GPIO_PCH_RSMRST_L"; }; gpio_ec_pch_wake_odl: ec_soc_wake_l { gpios = <&gpio0 3 GPIO_OUT_HIGH>; }; prochot_odl { gpios = <&gpiod 5 GPIO_ODR_HIGH>; enum-name = "GPIO_CPU_PROCHOT"; }; soc_alert_ec_l { gpios = <&gpioe 2 GPIO_INPUT>; }; gpio_usb_c0_tcpc_int_odl: usb_c0_tcpc_int_odl { gpios = <&gpioe 0 GPIO_INPUT>; enum-name = "GPIO_USB_C0_TCPC_INT_ODL"; }; gpio_usb_c1_tcpc_int_odl: usb_c1_tcpc_int_odl { gpios = <&gpioc 7 GPIO_INPUT>; enum-name = "GPIO_USB_C1_TCPC_INT_ODL"; }; gpio_usb_c0_ppc_int_odl: usb_c0_ppc_int_odl { gpios = <&gpio7 5 GPIO_INPUT>; enum-name = "GPIO_USB_C0_PPC_INT_ODL"; }; gpio_usb_c1_ppc_int_odl: usb_c1_ppc_int_odl { gpios = <&gpiod 4 GPIO_INPUT>; enum-name = "GPIO_USB_C1_PPC_INT_ODL"; }; gpio_usb_c0_bc12_int_odl: usb_c0_bc12_int_odl { gpios = <&gpioa 4 GPIO_INPUT_PULL_UP>; enum-name = "GPIO_USB_C0_BC12_INT_ODL"; }; gpio_usb_c1_bc12_int_odl: usb_c1_bc12_int_odl { gpios = <&gpio9 6 GPIO_INPUT_PULL_UP>; enum-name = "GPIO_USB_C1_BC12_INT_ODL"; }; gpio_usb_c0_tcpc_rst_l: usb_c0_tcpc_rst_l { gpios = <&gpio3 4 GPIO_OUT_HIGH>; enum-name = "GPIO_USB_C0_TCPC_RST_L"; }; gpio_usb_c1_tcpc_rst_l: usb_c1_tcpc_rst_l { gpios = <&gpio3 7 GPIO_OUT_HIGH>; enum-name = "GPIO_USB_C1_TCPC_RST_L"; }; usb_c0_hpd { gpios = <&gpiof 5 GPIO_OUT_LOW>; enum-name = "GPIO_USB_C0_DP_HPD"; }; usb_c1_hpd { gpios = <&gpiof 4 GPIO_OUT_LOW>; enum-name = "GPIO_USB_C1_DP_HPD"; }; gpio_lid_open: lid_open { gpios = <&gpio0 2 GPIO_INPUT>; enum-name = "GPIO_LID_OPEN"; }; ec_batt_pres_odl { gpios = <&gpio9 4 GPIO_INPUT>; enum-name = "GPIO_BATT_PRES_ODL"; }; ec_disable_disp_bl { gpios = <&gpioa 6 GPIO_OUT_HIGH>; enum-name = "GPIO_ENABLE_BACKLIGHT_L"; }; ec_i2c_usb_a0_c0_scl { gpios = <&gpiob 5 GPIO_INPUT>; }; ec_i2c_usb_a0_c0_sda { gpios = <&gpiob 4 GPIO_INPUT>; }; ec_i2c_usb_a1_c1_scl { gpios = <&gpio9 0 GPIO_INPUT>; }; ec_i2c_usb_a1_c1_sda { gpios = <&gpio8 7 GPIO_INPUT>; }; ec_i2c_batt_scl { gpios = <&gpio9 2 GPIO_INPUT>; }; ec_i2c_batt_sda { gpios = <&gpio9 1 GPIO_INPUT>; }; ec_i2c_usbc_mux_scl { gpios = <&gpiod 1 GPIO_INPUT>; }; ec_i2c_usbc_mux_sda { gpios = <&gpiod 0 GPIO_INPUT>; }; ec_i2c_power_scl { gpios = <&gpiof 3 GPIO_INPUT>; }; ec_i2c_power_sda { gpios = <&gpiof 2 GPIO_INPUT>; }; ec_i2c_cbi_scl { gpios = <&gpio3 3 GPIO_INPUT>; }; ec_i2c_cbi_sda { gpios = <&gpio3 6 GPIO_INPUT>; }; ec_i2c_sensor_scl { gpios = <&gpioe 4 GPIO_INPUT>; }; ec_i2c_sensor_sda { gpios = <&gpioe 3 GPIO_INPUT>; }; ec_i2c_soc_sic { gpios = <&gpiob 3 GPIO_INPUT>; }; ec_i2c_soc_sid { gpios = <&gpiob 2 GPIO_INPUT>; }; en_kb_bl { gpios = <&gpio9 7 GPIO_OUT_HIGH>; enum-name = "GPIO_EN_KEYBOARD_BACKLIGHT"; }; gpio_ec_kso_02_inv: ec_kso_02_inv { gpios = <&gpio1 7 (GPIO_OUT_LOW | GPIO_ACTIVE_LOW)>; }; tablet_mode { gpios = <&gpioc 1 GPIO_INPUT>; }; ec_gpio56 { gpios = <&gpio5 6 GPIO_INPUT_PULL_UP>; }; ec_flprg2 { gpios = <&gpio8 6 GPIO_INPUT_PULL_UP>; }; }; vsby-psl-in-list { /* PSL_IN1/2/4 are used to wake */ psl-in-pads = <&psl_in1 &psl_in2 &psl_in4>; }; named-ioexes { compatible = "named-ioexes"; usb_c0_tcpc_fastsw_ctl_en { gpios = <&ioex_c0_port0 4 GPIO_OUT_LOW>; enum-name = "IOEX_USB_C0_TCPC_FASTSW_CTL_EN"; label = "IOEX_USB_C0_TCPC_FASTSW_CTL_EN"; }; usb_c0_ppc_en_l { gpios = <&ioex_c0_port1 0 GPIO_OUT_LOW>; enum-name = "IOEX_USB_C0_PPC_EN_L"; label = "IOEX_USB_C0_PPC_EN_L"; }; usb_c0_ppc_ilim_3a_en { gpios = <&ioex_c0_port1 1 GPIO_OUT_LOW>; enum-name = "IOEX_USB_C0_PPC_ILIM_3A_EN"; label = "IOEX_USB_C0_PPC_ILIM_3A_EN"; }; /* TODO: figure out interrupts */ usb_c0_sbu_fault_odl { gpios = <&ioex_c0_port1 2 GPIO_INPUT>; enum-name = "IOEX_USB_C0_FAULT_ODL"; label = "IOEX_USB_C0_FAULT_ODL"; }; en_pp5500_usb_a0_vbus { gpios = <&ioex_c0_port1 5 GPIO_OUT_LOW>; enum-name = "IOEX_EN_PP5000_USB_A0_VBUS"; label = "IOEX_EN_PP5000_USB_A0_VBUS"; }; /* TODO: figure out interrupts */ usb_a0_fault_odl { gpios = <&ioex_c0_port1 6 GPIO_INPUT>; enum-name = "IOEX_USB3_A0_FAULT_L"; label = "IOEX_USB3_A0_FAULT_L"; }; usb_c0_sbu_flip { gpios = <&ioex_c0_port1 7 GPIO_OUT_LOW>; enum-name = "IOEX_USB_C0_SBU_FLIP"; label = "IOEX_USB_C0_SBU_FLIP"; }; usb_a1_retimer_en { gpios = <&ioex_c1_port0 0 GPIO_OUT_LOW>; enum-name = "IOEX_USB_A1_RETIMER_EN"; label = "IOEX_USB_A1_RETIMER_EN"; }; usb_a1_retimer_rst { gpios = <&ioex_c1_port0 1 GPIO_OUT_LOW>; enum-name = "IOEX_USB_A1_RETIMER_RST"; label = "IOEX_USB_A1_RETIMER_RST"; }; usb_c1_in_hpd { gpios = <&ioex_c1_port0 3 GPIO_OUT_LOW>; enum-name = "IOEX_USB_C1_HPD_IN_DB"; label = "IOEX_USB_C1_IN_HPD"; }; usb_c1_tcpc_fastsw_ctl_en { gpios = <&ioex_c1_port0 4 GPIO_OUT_LOW>; enum-name = "IOEX_USB_C1_TCPC_FASTSW_CTL_EN"; label = "IOEX_USB_C1_TCPC_FASTSW_CTL_EN"; }; usb_c1_ppc_en_l { gpios = <&ioex_c1_port1 0 GPIO_OUT_LOW>; enum-name = "IOEX_USB_C1_PPC_EN_L"; label = "IOEX_USB_C1_PPC_EN_L"; }; usb_c1_ppc_ilim_3a_en { gpios = <&ioex_c1_port1 1 GPIO_OUT_LOW>; enum-name = "IOEX_USB_C1_PPC_ILIM_3A_EN"; label = "IOEX_USB_C1_PPC_ILIM_3A_EN"; }; /* TODO: figure out interrupts */ usb_c1_sbu_fault_odl { gpios = <&ioex_c1_port1 2 GPIO_INPUT>; enum-name = "IOEX_USB_C1_FAULT_ODL"; label = "IOEX_USB_C1_FAULT_ODL"; }; en_pp5500_usb_a1_vbus { gpios = <&ioex_c1_port1 5 GPIO_OUT_LOW>; enum-name = "IOEX_EN_PP5000_USB_A1_VBUS_DB"; label = "IOEX_EN_PP5000_USB_A1_VBUS"; }; /* TODO: figure out interrupts */ usb_a1_fault_db_odl { gpios = <&ioex_c1_port1 6 GPIO_INPUT>; enum-name = "IOEX_USB_A1_FAULT_DB_ODL"; label = "IOEX_USB_A1_FAULT_DB_ODL"; }; usb_c1_sbu_flip { gpios = <&ioex_c1_port1 7 GPIO_OUT_LOW>; enum-name = "IOEX_USB_C1_SBU_FLIP"; label = "IOEX_USB_C1_SBU_FLIP"; }; }; }; /* PSL input pads*/ &psl_in1 { /* MECH_PWR_BTN_ODL */ flag = ; }; &psl_in2 { /* ACOK_OD */ flag = ; }; &psl_in4 { /* LID_OPEN */ flag = ; }; &i2c0_0 { status = "okay"; nct3807_C0:nct3807_C0@70 { #address-cells = <1>; #size-cells = <0>; compatible = "nuvoton,nct38xx-gpio"; reg = <0x70>; label = "NCT3807_C0"; ioex_c0_port0:gpio@0 { compatible = "nuvoton,nct38xx-gpio-port"; reg = <0x0>; label = "NCT3807_C0_GPIO0"; gpio-controller; #gpio-cells = <2>; ngpios = <8>; pin_mask = <0xff>; pinmux_mask = <0xf7>; }; ioex_c0_port1:gpio@1 { compatible = "nuvoton,nct38xx-gpio-port"; reg = <0x1>; label = "NCT3807_C0_GPIO1"; gpio-controller; #gpio-cells = <2>; ngpios = <8>; pin_mask = <0xff>; }; }; nct3808_alert_0 { compatible = "nuvoton,nct38xx-gpio-alert"; irq-gpios = <&gpioe 0 GPIO_ACTIVE_LOW>; nct38xx-dev = <&nct3807_C0>; label = "NCT3807_ALERT_0"; }; }; &i2c1_0 { status = "okay"; nct3807_C1:nct3807_C1@70 { #address-cells = <1>; #size-cells = <0>; compatible = "nuvoton,nct38xx-gpio"; reg = <0x70>; label = "NCT3807_C1"; ioex_c1_port0:gpio@0 { compatible = "nuvoton,nct38xx-gpio-port"; reg = <0x0>; label = "NCT3807_C1_GPIO0"; gpio-controller; #gpio-cells = <2>; ngpios = <8>; pin_mask = <0xff>; pinmux_mask = <0xf7>; }; ioex_c1_port1:gpio@1 { compatible = "nuvoton,nct38xx-gpio-port"; reg = <0x1>; label = "NCT3807_C1_GPIO1"; gpio-controller; #gpio-cells = <2>; ngpios = <8>; pin_mask = <0xff>; }; }; nct3808_alert_1 { compatible = "nuvoton,nct38xx-gpio-alert"; irq-gpios = <&gpioc 7 GPIO_ACTIVE_LOW>; nct38xx-dev = <&nct3807_C1>; label = "NCT3807_ALERT_1"; }; };