1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
|
/* Copyright 2017 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "common.h"
#include "console.h"
#include "gpio.h"
#include "hooks.h"
#include "host_command.h"
#include "spi.h"
#include "system.h"
#include "task.h"
#include "registers.h"
#define CPRINTS(format, args...) cprints(CC_SYSTEM, format, ## args)
static void ap_deferred(void)
{
if (gpio_get_level(GPIO_SLP_S3_L)) {
/* S0 */
gpio_set_flags(GPIO_EC_INT_L, GPIO_ODR_HIGH | GPIO_PULL_UP);
hook_notify(HOOK_CHIPSET_RESUME);
} else {
/* S3 */
gpio_set_flags(GPIO_EC_INT_L, GPIO_INPUT);
hook_notify(HOOK_CHIPSET_SUSPEND);
}
}
DECLARE_DEFERRED(ap_deferred);
void slp_event(enum gpio_signal signal)
{
hook_call_deferred(&ap_deferred_data, 0);
}
#include "gpio_list.h"
/* SPI devices */
const struct spi_device_t spi_devices[] = {
/* Fingerprint sensor */
{ CONFIG_SPI_FP_PORT, 1, GPIO_SPI3_NSS }
};
const unsigned int spi_devices_used = ARRAY_SIZE(spi_devices);
/* Initialize board-specific configuraiton */
static void board_init(void)
{
/* Set all SPI master signal pins to very high speed: pins B3/B4/B5 */
STM32_GPIO_OSPEEDR(GPIO_B) |= 0x00000fc0;
/* Enable clocks to SPI3 module (master) */
STM32_RCC_APB1ENR |= STM32_RCC_PB1_SPI3;
/* Enable interrupt on SLP_S3_L */
gpio_enable_interrupt(GPIO_SLP_S3_L);
/* enable the SPI slave interface if the PCH is up */
hook_call_deferred(&ap_deferred_data, 0);
}
DECLARE_HOOK(HOOK_INIT, board_init, HOOK_PRIO_DEFAULT);
static int fp_command_passthru(struct host_cmd_handler_args *args)
{
const struct ec_params_fp_passthru *params = args->params;
void *out = args->response;
int rc;
int ret = EC_RES_SUCCESS;
if (system_is_locked())
return EC_RES_ACCESS_DENIED;
if (params->len > args->params_size +
offsetof(struct ec_params_fp_passthru, data) ||
params->len > args->response_max)
return EC_RES_INVALID_PARAM;
rc = spi_transaction_async(&spi_devices[0], params->data,
params->len, out, SPI_READBACK_ALL);
if (params->flags & EC_FP_FLAG_NOT_COMPLETE)
rc |= spi_transaction_wait(&spi_devices[0]);
else
rc |= spi_transaction_flush(&spi_devices[0]);
if (rc == EC_ERROR_TIMEOUT)
ret = EC_RES_TIMEOUT;
else if (rc)
ret = EC_RES_ERROR;
args->response_size = params->len;
return ret;
}
DECLARE_HOST_COMMAND(EC_CMD_FP_PASSTHRU, fp_command_passthru, EC_VER_MASK(0));
|
