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/* Copyright 2023 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
#include "common.h"
#include "compile_time_macros.h"
#include "console.h"
#include "driver/ppc/nx20p348x.h"
#include "driver/ppc/syv682x_public.h"
#include "driver/tcpm/nct38xx.h"
#include "driver/tcpm/ps8xxx_public.h"
#include "driver/tcpm/tcpci.h"
#include "ec_commands.h"
#include "gpio.h"
#include "gpio_signal.h"
#include "hooks.h"
#include "ioexpander.h"
#include "system.h"
#include "task.h"
#include "task_id.h"
#include "timer.h"
#include "usb_mux.h"
#include "usb_pd.h"
#include "usb_pd_tcpm.h"
#include "usbc_config.h"
#include "usbc_ppc.h"
#include <stdbool.h>
#include <stdint.h>
#define CPRINTF(format, args...) cprintf(CC_USBPD, format, ##args)
#define CPRINTS(format, args...) cprints(CC_USBPD, format, ##args)
/* USBC TCPC configuration */
const struct tcpc_config_t tcpc_config[] = {
[USBC_PORT_C0] = {
.bus_type = EC_BUS_TYPE_I2C,
.i2c_info = {
.port = I2C_PORT_USB_C0_TCPC,
.addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
},
.drv = &nct38xx_tcpm_drv,
.flags = TCPC_FLAGS_TCPCI_REV2_0 |
TCPC_FLAGS_NO_DEBUG_ACC_CONTROL,
},
[USBC_PORT_C1] = {
.bus_type = EC_BUS_TYPE_I2C,
.i2c_info = {
.port = I2C_PORT_USB_C1_TCPC,
.addr_flags = PS8XXX_I2C_ADDR1_FLAGS,
},
.drv = &ps8xxx_tcpm_drv,
.flags = TCPC_FLAGS_TCPCI_REV2_0 |
TCPC_FLAGS_TCPCI_REV2_0_NO_VSAFE0V |
TCPC_FLAGS_CONTROL_VCONN |
TCPC_FLAGS_CONTROL_FRS,
},
};
BUILD_ASSERT(ARRAY_SIZE(tcpc_config) == USBC_PORT_COUNT);
BUILD_ASSERT(CONFIG_USB_PD_PORT_MAX_COUNT == USBC_PORT_COUNT);
/******************************************************************************/
/* USB-A charging control */
const int usb_port_enable[USB_PORT_COUNT] = {
GPIO_EN_PP5000_USBA_R,
};
BUILD_ASSERT(ARRAY_SIZE(usb_port_enable) == USB_PORT_COUNT);
/******************************************************************************/
/* USBC PPC configuration */
struct ppc_config_t ppc_chips[] = {
[USBC_PORT_C0] = {
.i2c_port = I2C_PORT_USB_C0_PPC,
.i2c_addr_flags = SYV682X_ADDR0_FLAGS,
.frs_en = IOEX_USB_C0_FRS_EN,
.drv = &syv682x_drv,
},
[USBC_PORT_C1] = {
/* Compatible with Silicon Mitus SM5360A */
.i2c_port = I2C_PORT_USB_C1_PPC,
.i2c_addr_flags = NX20P3483_ADDR2_FLAGS,
.drv = &nx20p348x_drv,
},
};
BUILD_ASSERT(ARRAY_SIZE(ppc_chips) == USBC_PORT_COUNT);
unsigned int ppc_cnt = ARRAY_SIZE(ppc_chips);
/*
* USB3 DB mux configuration - the top level mux still needs to be set
* to the virtual_usb_mux_driver so the AP gets notified of mux changes
* and updates the TCSS configuration on state changes.
*/
static const struct usb_mux_chain usbc1_usb3_db_retimer = {
.mux =
&(const struct usb_mux){
.usb_port = USBC_PORT_C1,
.driver = &tcpci_tcpm_usb_mux_driver,
.hpd_update = &ps8xxx_tcpc_update_hpd_status,
},
};
const struct usb_mux_chain usb_muxes[] = {
[USBC_PORT_C0] = {
.mux = &(const struct usb_mux) {
.usb_port = USBC_PORT_C1,
.driver = &virtual_usb_mux_driver,
.hpd_update = &virtual_hpd_update,
},
},
[USBC_PORT_C1] = {
.mux = &(const struct usb_mux) {
/* PS8815 DB */
.usb_port = USBC_PORT_C1,
.driver = &virtual_usb_mux_driver,
.hpd_update = &virtual_hpd_update,
},
.next = &usbc1_usb3_db_retimer,
},
};
BUILD_ASSERT(ARRAY_SIZE(usb_muxes) == USBC_PORT_COUNT);
/*
* ioex_init() is normally called before we take the TCPCs out of
* reset, so we need to start in disabled mode, then explicitly
* call ioex_init().
*/
struct ioexpander_config_t ioex_config[] = {
[IOEX_C0_NCT38XX] = {
.i2c_host_port = I2C_PORT_USB_C0_TCPC,
.i2c_addr_flags = NCT38XX_I2C_ADDR1_1_FLAGS,
.drv = &nct38xx_ioexpander_drv,
.flags = IOEX_FLAGS_DEFAULT_INIT_DISABLED,
},
};
BUILD_ASSERT(ARRAY_SIZE(ioex_config) == CONFIG_IO_EXPANDER_PORT_COUNT);
void board_reset_pd_mcu(void)
{
/*
* TODO(b/179648104): figure out correct timing
*/
gpio_set_level(GPIO_USB_C0_TCPC_RST_ODL, 0);
gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 0);
/*
* delay for power-on to reset-off and min. assertion time
*/
msleep(20);
gpio_set_level(GPIO_USB_C0_TCPC_RST_ODL, 1);
gpio_set_level(GPIO_USB_C1_RT_RST_R_ODL, 1);
/* wait for chips to come up */
msleep(50);
}
static void board_tcpc_init(void)
{
/* Don't reset TCPCs after initial reset */
if (!system_jumped_late())
board_reset_pd_mcu();
/*
* These IO expander pins are implemented using the
* C0/C2 TCPC, so they must be set up after the TCPC has
* been taken out of reset.
*/
ioex_init(IOEX_C0_NCT38XX);
/* Enable PPC interrupts. */
gpio_enable_interrupt(GPIO_USB_C0_PPC_INT_ODL);
gpio_enable_interrupt(GPIO_USB_C1_PPC_INT_ODL);
/* Enable TCPC interrupts. */
gpio_enable_interrupt(GPIO_USB_C0_TCPC_INT_ODL);
gpio_enable_interrupt(GPIO_USB_C1_TCPC_INT_ODL);
}
DECLARE_HOOK(HOOK_INIT, board_tcpc_init, HOOK_PRIO_INIT_CHIPSET);
uint16_t tcpc_get_alert_status(void)
{
uint16_t status = 0;
if (gpio_get_level(GPIO_USB_C0_TCPC_INT_ODL) == 0)
status |= PD_STATUS_TCPC_ALERT_0 | PD_STATUS_TCPC_ALERT_2;
if (gpio_get_level(GPIO_USB_C1_TCPC_INT_ODL) == 0)
status |= PD_STATUS_TCPC_ALERT_1;
return status;
}
int ppc_get_alert_status(int port)
{
if (port == USBC_PORT_C0)
return gpio_get_level(GPIO_USB_C0_PPC_INT_ODL) == 0;
else if (port == USBC_PORT_C1)
return gpio_get_level(GPIO_USB_C1_PPC_INT_ODL) == 0;
return 0;
}
void tcpc_alert_event(enum gpio_signal signal)
{
switch (signal) {
case GPIO_USB_C0_TCPC_INT_ODL:
schedule_deferred_pd_interrupt(USBC_PORT_C0);
break;
case GPIO_USB_C1_TCPC_INT_ODL:
schedule_deferred_pd_interrupt(USBC_PORT_C1);
break;
default:
break;
}
}
void ppc_interrupt(enum gpio_signal signal)
{
switch (signal) {
case GPIO_USB_C0_PPC_INT_ODL:
syv682x_interrupt(USBC_PORT_C0);
break;
case GPIO_USB_C1_PPC_INT_ODL:
nx20p348x_interrupt(USBC_PORT_C1);
break;
default:
break;
}
}
__override bool board_is_dts_port(int port)
{
return port == USBC_PORT_C0;
}
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