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/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/* USB Power delivery board configuration */
#ifndef __USB_PD_CONFIG_H
#define __USB_PD_CONFIG_H
/* Timer selection for baseband PD communication */
#define TIM_CLOCK_PD_TX 14
#define TIM_CLOCK_PD_RX 1
/* use the hardware accelerator for CRC */
#define CONFIG_HW_CRC
/* TX is using SPI1 on PB3-5 */
#define SPI_REGS STM32_SPI1_REGS
#define DMAC_SPI_TX STM32_DMAC_CH3
static inline void spi_enable_clock(void)
{
STM32_RCC_APB2ENR |= STM32_RCC_PB2_SPI1;
}
/* RX is using COMP1 triggering TIM1 CH1 */
#define DMAC_TIM_RX STM32_DMAC_CH2
#define TIM_CCR_IDX 1
#define TIM_CCR_CS 1
#define EXTI_COMP_MASK (1 << 21)
#define IRQ_COMP STM32_IRQ_COMP
/* triggers packet detection on comparator falling edge */
#define EXTI_XTSR STM32_EXTI_FTSR
/* the pins used for communication need to be hi-speed */
static inline void pd_set_pins_speed(void)
{
/* 40 MHz pin speed on SPI PB3/4/5 */
STM32_GPIO_OSPEEDR(GPIO_B) |= 0x00000FC0;
/* 40 MHz pin speed on TIM14_CH1 (PB1) */
STM32_GPIO_OSPEEDR(GPIO_B) |= 0x0000000C;
}
/* Drive the CC line from the TX block */
static inline void pd_tx_enable(int polarity)
{
/* set the low level reference */
gpio_set_level(polarity ? GPIO_USB_C0_CC2_TX_EN :
GPIO_USB_C0_CC1_TX_EN, 1);
/* put SPI function on TX pin */
if (polarity) /* PE14 is SPI1 MISO */
gpio_set_alternate_function(GPIO_E, 0x4000, 1);
else /* PB4 is SPI1 MISO */
gpio_set_alternate_function(GPIO_B, 0x0010, 0);
}
/* Put the TX driver in Hi-Z state */
static inline void pd_tx_disable(int polarity)
{
/*
* output low on SPI TX by removing alternate function mode which
* restores to the initial configuration in board.c
*/
if (polarity) /* PE14 is SPI1 MISO */
gpio_set_alternate_function(GPIO_E, 0x4000, -1);
else /* PB4 is SPI1 MISO */
gpio_set_alternate_function(GPIO_B, 0x0010, -1);
/* put the low level reference in Hi-Z */
gpio_set_level(polarity ? GPIO_USB_C0_CC2_TX_EN :
GPIO_USB_C0_CC1_TX_EN, 0);
}
/* we know the plug polarity, do the right configuration */
static inline void pd_select_polarity(int polarity)
{
/* use the right comparator non inverted input for COMP1 */
STM32_COMP_CSR = (STM32_COMP_CSR & ~STM32_COMP_CMP1INSEL_MASK)
| STM32_COMP_CMP1EN
| (polarity ? STM32_COMP_CMP1INSEL_INM4
: STM32_COMP_CMP1INSEL_INM6);
}
/* Initialize pins used for TX and put them in Hi-Z */
static inline void pd_tx_init(void)
{
gpio_config_module(MODULE_USB_PD, 1);
}
static inline void pd_set_host_mode(int enable)
{
if (enable) {
/* We never charging in power source mode */
gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, 1);
/* High-Z is used for host mode. */
gpio_set_level(GPIO_USB_C0_CC1_ODL, 1);
gpio_set_level(GPIO_USB_C0_CC2_ODL, 1);
} else {
/* Kill VBUS power supply */
gpio_set_level(GPIO_USB_C0_5V_EN, 0);
/* Pull low for device mode. */
gpio_set_level(GPIO_USB_C0_CC1_ODL, 0);
gpio_set_level(GPIO_USB_C0_CC2_ODL, 0);
/* Enable the charging path*/
gpio_set_level(GPIO_USB_C0_CHARGE_EN_L, 0);
}
}
static inline int pd_adc_read(int cc)
{
if (cc == 0)
return adc_read_channel(ADC_C0_CC1_PD);
else
return adc_read_channel(ADC_C0_CC2_PD);
}
static inline int pd_snk_is_vbus_provided(void)
{
return gpio_get_level(GPIO_USB_C0_VBUS_WAKE);
}
/* Standard-current DFP : no-connect voltage is 1.55V */
#define PD_SRC_VNC 1550 /* mV */
/* UFP-side : threshold for DFP connection detection */
#define PD_SNK_VA 200 /* mV */
/* start as a sink in case we have no other power supply/battery */
#define PD_DEFAULT_STATE PD_STATE_SNK_DISCONNECTED
/* delay necessary for the voltage transition on the power supply */
#define PD_POWER_SUPPLY_TRANSITION_DELAY 50000 /* us */
#endif /* __USB_PD_CONFIG_H */
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