blob: 17fbfcf0b9acc27d770bffbbb0f66a5daf4798dd (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
|
#include "config.h"
#define CONFIG_FW_SECT_OFF(section) CONFIG_FW_##section##_OFF
#define CONFIG_FW_BASE(section) (CONFIG_FLASH_BASE + CONFIG_FW_SECT_OFF(section))
OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
OUTPUT_ARCH(arm)
ENTRY(reset)
MEMORY
{
FLASH (rx) : ORIGIN = CONFIG_FW_BASE(SECTION), LENGTH = CONFIG_FW_IMAGE_SIZE
IRAM (rw) : ORIGIN = CONFIG_RAM_BASE, LENGTH = CONFIG_RAM_SIZE
}
SECTIONS
{
.text : {
OUTDIR/chip/CHIP/init.o (.text)
*(.text)
} > FLASH
. = ALIGN(4);
.rodata : {
__irqprio = .;
*(.rodata.irqprio)
__irqprio_end = .;
*(.rodata*)
. = ALIGN(4);
} > FLASH
__ro_end = . ;
.data : AT(ADDR(.rodata) + SIZEOF(.rodata)) {
. = ALIGN(4);
__data_start = .;
*(.data.tasks)
*(.data)
. = ALIGN(4);
__data_end = .;
} > IRAM
.bss : {
. = ALIGN(4);
__bss_start = .;
*(.bss)
. = ALIGN(4);
__bss_end = .;
} > IRAM
/DISCARD/ : { *(.ARM.*) }
}
|
