blob: 434945b04c65c6762cf937a9d81aa7585acb4f67 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
|
/* Copyright 2017 The ChromiumOS Authors
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
* NPCX SoC spi flash update tool
*/
/* Memory Spaces Definitions */
MEMORY
{
CODERAM (rx) : ORIGIN = 0x200C3020, LENGTH = 0xFE0
}
/*
* The entry point is informative, for debuggers and simulators,
* since the Cortex-M vector points to it anyway.
*/
ENTRY(sspi_flash_upload)
/* Sections Definitions */
SECTIONS
{
.startup_text :
{
. = ALIGN(4);
*(.startup_text ) /* Startup code */
. = ALIGN(4);
} >CODERAM
/*
* The program code is stored in the .text section,
* which goes to CODERAM.
*/
.text :
{
. = ALIGN(4);
*(.text .text.*) /* all remaining code */
*(.rodata .rodata.*) /* read-only data (constants) */
} >CODERAM
. = ALIGN(4);
_etext = .;
/*
* This address is used by the startup code to
* initialise the .data section.
*/
_sidata = _etext;
/DISCARD/ : { *(.ARM.*) }
}
|
