1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
|
/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*
* Cortex-M0 CPU initialization
*/
#include "config.h"
.section .text.vecttable
.macro vector name
.long \name\()_handler
.weak \name\()_handler
.set \name\()_handler, default_handler
.endm
.macro vector_irq number
.if \number < CONFIG_IRQ_COUNT
vector irq_\()\number
.endif
.endm
/* Exceptions vector */
vectors:
.long stack_end @ initial stack pointer
.long reset @ reset handler
vector nmi @ NMI handler
vector hard_fault @ HardFault handler
vector mpu_fault @ MPU fault handler
vector bus_fault @ Bus fault handler
vector usage_fault @ Usage fault handler
.long 0 @ reserved
.long 0 @ reserved
.long 0 @ reserved
.long 0 @ reserved
vector svc @ SWI
vector debug @ Debug handler
.long 0 @ reserved
vector pendsv @ PendSV handler
vector sys_tick @ SysTick handler
vector_irq 0 @ IRQ 0 handler
vector_irq 1 @ IRQ 1 handler
vector_irq 2 @ IRQ 2 handler
vector_irq 3 @ IRQ 3 handler
vector_irq 4 @ IRQ 4 handler
vector_irq 5 @ IRQ 5 handler
vector_irq 6 @ IRQ 6 handler
vector_irq 7 @ IRQ 7 handler
vector_irq 8 @ IRQ 8 handler
vector_irq 9 @ IRQ 9 handler
vector_irq 10 @ IRQ 10 handler
vector_irq 11 @ IRQ 11 handler
vector_irq 12 @ IRQ 12 handler
vector_irq 13 @ IRQ 13 handler
vector_irq 14 @ IRQ 14 handler
vector_irq 15 @ IRQ 15 handler
vector_irq 16 @ IRQ 16 handler
vector_irq 17 @ IRQ 17 handler
vector_irq 18 @ IRQ 18 handler
vector_irq 19 @ IRQ 19 handler
vector_irq 20 @ IRQ 20 handler
vector_irq 21 @ IRQ 21 handler
vector_irq 22 @ IRQ 22 handler
vector_irq 23 @ IRQ 23 handler
vector_irq 24 @ IRQ 24 handler
vector_irq 25 @ IRQ 25 handler
vector_irq 26 @ IRQ 26 handler
vector_irq 27 @ IRQ 27 handler
vector_irq 28 @ IRQ 28 handler
vector_irq 29 @ IRQ 29 handler
vector_irq 30 @ IRQ 30 handler
vector_irq 31 @ IRQ 31 handler
#ifdef CHIP_FAMILY_STM32F0
/* Allocate space for SRAM vector table at SRAM based address */
.section .bss.vector_table
sram_vtable: .skip (48*4)
#endif
.text
.syntax unified
.code 16
.global reset
.thumb_func
reset:
/*
* Ensure we're in privileged mode with main stack. Necessary if
* we've jumped directly here from another image after task_start().
*/
movs r0, #0 @ priv. mode / main stack / no floating point
msr control, r0
isb @ ensure the write is done
/* Clear BSS */
movs r0, #0
ldr r1,_bss_start
ldr r2,_bss_end
bss_loop:
str r0, [r1]
adds r1, #4
cmp r1, r2
blt bss_loop
#ifdef CHIP_FAMILY_STM32F0
/*
* STM32F0 parts don't have the VTOR register for relocating
* the vector table. Instead, we must copy the vector table from
* flash into SRAM.
*/
ldr r1, =vectors
ldr r2, =sram_vtable
movs r0, #0
vtable_loop:
ldr r3, [r1]
str r3, [r2]
adds r1, #4
adds r2, #4
adds r0, #1
cmp r0, #48
blt vtable_loop
/* Set SYSCFG_CFGR1 mem_mode to load vector table from SRAM */
movs r0, #3
ldr r1, =0x40010000
str r0, [r1]
#else
/* Set the vector table on our current code */
ldr r1, =vectors
ldr r2, =0xE000ED08 /* VTOR register in SCB*/
str r1, [r2]
#endif
/* Copy initialized data to Internal RAM */
ldr r0,_ro_end
ldr r1,_data_start
ldr r2,_data_end
data_loop:
ldr r3, [r0]
adds r0, #4
str r3, [r1]
adds r1, #4
cmp r1, r2
blt data_loop
/*
* Set stack pointer. Already done by Cortex-M hardware, but re-doing
* this here allows software to jump directly to the reset vector.
*/
ldr r0, =stack_end
mov sp, r0
/* Jump to C code */
bl main
/* That should not return. If it does, loop forever. */
fini_loop:
b fini_loop
/* Default exception handler */
.thumb_func
default_handler:
ldr r0, =exception_panic
bx r0
.align 2
_bss_start:
.long __bss_start
_bss_end:
.long __bss_end
_data_start:
.long __data_start
_data_end:
.long __data_end
_ro_end:
.long __ro_end
/* Dummy functions to avoid linker complaints */
.global __aeabi_unwind_cpp_pr0
.global __aeabi_unwind_cpp_pr1
.global __aeabi_unwind_cpp_pr2
__aeabi_unwind_cpp_pr0:
__aeabi_unwind_cpp_pr1:
__aeabi_unwind_cpp_pr2:
bx lr
/* Reserve space for system stack */
.section .bss.system_stack
stack_start:
.space CONFIG_STACK_SIZE, 0
stack_end:
.global stack_end
|
