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/* Copyright 2021 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/dts-v1/;
#include <cros/nuvoton/npcx7.dtsi>
#include <nuvoton/npcx/npcx7/npcx7-pinctrl.dtsi>
/*
* #include <nuvoton/npcx7m6fb.dtsi>
* #include <nuvoton/npcx7m6fc.dtsi>
* #include <nuvoton/npcx7m7fc.dtsi>
*/
#include <nuvoton/npcx7m6fc.dtsi>
#include "npcx_evb.dtsi"
&uart1 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart1_2_sin_sout_gp64_65>;
pinctrl-names = "default";
};
/* PSL_OUT is fixed to GPIO85 in npcx7 series. */
&power_ctrl_psl {
enable-gpios = <&gpio8 5 0>;
};
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