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/* Copyright 2022 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/ {
gpio-interrupts {
compatible = "cros-ec,gpio-interrupts";
int_lid_open: lid_open {
irq-pin = <&smc_lid>;
flags = <GPIO_INT_EDGE_BOTH>;
handler = "lid_interrupt";
};
int_power_button: power_button {
irq-pin = <&mech_pwr_btn_odl>;
flags = <GPIO_INT_EDGE_BOTH>;
handler = "power_button_interrupt";
};
int_ac_present: ac_present {
irq-pin = <&bc_acok>;
flags = <GPIO_INT_EDGE_BOTH>;
handler = "extpower_interrupt";
};
int_slp_s0: slp_s0 {
irq-pin = <&pch_slp_s0_n>;
flags = <GPIO_INT_EDGE_BOTH>;
handler = "power_signal_interrupt";
};
int_slp_sus: slp_sus {
irq-pin = <&pm_slp_sus_ec_n>;
flags = <GPIO_INT_EDGE_BOTH>;
handler = "power_signal_interrupt";
};
int_pg_dsw_pwrok: pg_dsw_pwrok {
irq-pin = <&vccpdsw_3p3>;
flags = <GPIO_INT_EDGE_BOTH>;
handler = "power_signal_interrupt";
};
int_rsmrst_pwrgd: rsmrst_pwrgd {
irq-pin = <&rsmrst_pwrgd>;
flags = <GPIO_INT_EDGE_BOTH>;
handler = "power_signal_interrupt";
};
int_all_sys_pwrgd: all_sys_pwrgd {
irq-pin = <&all_sys_pwrgd>;
flags = <GPIO_INT_EDGE_BOTH>;
handler = "power_signal_interrupt";
};
};
};
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