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/* Copyright 2022 The Chromium OS Authors. All rights reserved.
* Use of this source code is governed by a BSD-style license that can be
* found in the LICENSE file.
*/
/ {
named-i2c-ports {
compatible = "named-i2c-ports";
battery: battery {
i2c-port = <&i2c7_0>;
enum-name = "I2C_PORT_BATTERY";
};
charger {
i2c-port = <&i2c7_0>;
enum-name = "I2C_PORT_CHARGER";
};
typec_aic1 {
i2c-port = <&i2c0_0>;
enum-name = "I2C_PORT_TYPEC_AIC_1";
};
typec_aic2 {
i2c-port = <&i2c2_0>;
enum-name = "I2C_PORT_TYPEC_AIC_2";
};
};
};
/* charger */
&i2c7_0 {
status = "okay";
clock-frequency = <I2C_BITRATE_STANDARD>;
pca95xx: pca95xx@22 {
compatible = "nxp,pca95xx";
label = "PCA95XX";
reg = <0x22>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
};
rvp_board_id: rvp-board-id {
compatible = "intel,rvp-board-id";
/*
* BOM ID [2] : IOEX[0]
* BOM ID [1:0] : IOEX[15:14]
*/
bom-gpios = <&pca95xx 0 0>, <&pca95xx 15 0>, <&pca95xx 14 0>;
/*
* FAB ID [1:0] : IOEX[2:1]
*/
fab-gpios = <&pca95xx 2 0>, <&pca95xx 1 0>;
/*
* BOARD ID[5:0] : IOEX[13:8]
*/
board-gpios = <&pca95xx 13 0>, <&pca95xx 12 0>, <&pca95xx 11 0>,
<&pca95xx 10 0>, <&pca95xx 9 0>, <&pca95xx 8 0>;
};
};
&i2c_ctrl7 {
status = "okay";
};
/* typec_aic1 */
&i2c0_0 {
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c_ctrl0 {
status = "okay";
};
/* typec_aic2 */
&i2c2_0 {
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c_ctrl2 {
status = "okay";
};
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